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MPC8358E Datasheet(PDF) 12 Page - Freescale Semiconductor, Inc |
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MPC8358E Datasheet(HTML) 12 Page - Freescale Semiconductor, Inc |
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12 / 96 page ![]() MPC8358E PowerQUICC™ II Pro Processor Revision 2.1 PBGA Silicon Hardware Specifications, Rev. 1 12 Freescale Semiconductor Power Characteristics fully ramp up. In the case where the core voltage is applied first, the core voltage supply must rise to 90% of its nominal value before the I/O supplies reach 0.7 V, see Figure 4. Figure 4. Power Sequencing Example I/O voltage supplies (GVDD, LVDD, and OVDD) do not have any ordering requirements with respect to one another. 2.2.2 Power-Down Sequencing The MPC8358E does not require the core supply voltage and I/O supply voltages to be powered-down in any particular order. 3 Power Characteristics The estimated typical power dissipation values are shown in Table 4. Table 4. MPC8358E PBGA Core Power Dissipation1 Core Frequency (MHz) CSB Frequency (MHz) QUICC Engine Frequency (MHz) Typical Maximum Unit Notes 266 266 266 2.2 2.3 W 2, 3, 4 400 266 266 2.4 2.5 W 2, 3, 4 Notes: 1. The values do not include I/O supply power (OVDD, LVDD, GVDD) or AVDD. For I/O power values, see Table 5. 2. Typical power is based on a voltage of VDD = 1.2 V, a junction temperature of TJ = 105°C, and a Dhrystone benchmark application. 3. Thermal solutions will likely need to design to a value higher than typical power on the end application, TA target, and I/O power. 4. Maximum power is based on a voltage of VDD = 1.2 V, WC process, a junction TJ = 105°C, and an artificial smoke test. I/O Voltage (GVDD, LVDD, OVDD) Core Voltage (VDD, AVDD) 90% 0.7 V Time Voltage |
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