WS9623AB3DF datasheet(9/19 Pages) VIMICRO

9 / 19 page

WS9623AB3DF

Datasheet (V1.2)

FUNCTIONAL BLOCK DESCRIPTION

Radio Transceiver

The WS9623AB3DF features an integrated radio

transceiver that has been optimized for Bluetooth 2.4

GHz wireless systems. It has been designed to

provide

low

power,

low

cost,

and

robust

communications for applications operating in the

globally available 2.4 GHz unlicensed ISM band. It is

fully compliant with the Bluetooth Radio Specification

4.1 and EDR specification, and meets or exceeds the

requirements to provide the highest communication

link quality of service.

Transmitter Path

The WS9623AB3DF features a fully integrated zero-IF

transmitter. The baseband transmits GFSK, DQPSK,

8DPSK data is digitally modulated in the modem block,

and then up-converts the data to the 2.4 GHz ISM

band in the transmitter path.

The transmitter path

consists of signal filters, I/Q up-converters, output

Power Amplifiers (PAs), and RF filters. The digital

modulator performs the data modulation and filtering

required for the GFSK, DQPSK, and 8-DPSK signals.

The fully digital modulator minimizes any frequency

drift or anomalies in the modulation characteristics of

the transmitted signal.

Receiver Path

The

receiver

path

uses

innovative

Adaptive-Adjustable-IF architecture (patent pending)

for improved anti-interference performance and low

power consumption. The front-end topology with

built-in

out-of-band

attenuation

enables

the

WS9623AB3DF to be used in most applications with

no off-chip filtering. The digital demodulator and bit

synchronizer take the down-converted received signal

and perform an optimal frequency tracking and bit

synchronization algorithm. The radio portion of the

WS9623AB3DF also provides a Received Signal

Strength Indication (RSSI) signal to the baseband so

that the controller can participate in a Bluetooth

power-controlled link.

Audio codec

Audio Codec includes two channel voice band 24bit

ADC, which can support stereo microphone recording,

with one microphone bias output. The codec also has

two channel CD quality 24bit Audio DACs, which

support two 16

Ω headphone / speakers with two

40mW output, or two

32Ω headphone / speakers with

two 40mW output.

Power Management

PMU is an integrated power solution for applications

power solution for WS9623AB3DF. It provides one

highly efficient, low output ripple step-down converter

to the core voltage. Step-down converter enters PFM

mode at light load for maximum efficiency over the

widest possible range of load currents. The PMU also

integrates three LDO regulators (with Charger bypass

mode), POR, Start-up controller and a battery charger.

The charger block will provide smart battery charging

management, while LDO will provide a low-noise

power supply for WS9623, and POR will provide reset

signal for digital core.

SRAM

The SRAM of 128kB is used in WS9623AB3DF Chip.

This memory stores the data generated or required by

running

the high performance CPU.

ROM

The

VIA

ROM

512KB

employed

WS9623AB3DF Chip. This memory is used to store

the firmware.

WS9623AB3DF Datasheet(PDF) 9 Page - Vimicro Corp.

WS9623AB3DF Datasheet(HTML) 9 Page - Vimicro Corp.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

Datasheet Download

Link URL