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PCM1738E/2K Datasheet(PDF) 35 Page - Texas Instruments |
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PCM1738E/2K Datasheet(HTML) 35 Page - Texas Instruments |
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35 / 47 page ![]() www.ti.com PCM1738 SBAS174C – FEBRUARY 2002 – REVISED FEBRUARY 2007 OS[1:0] Delta-Sigma Oversampling Rate Selection These bits are available for read/write. Default Value: 00 OS[1:0] Operation Speed Select 00 8 × f WDCK (default) 01 Reserved 10 16 × f WDCK 11 4 × f WDCK The effective oversampling rate is determined by the oversampling performed by both the external digital filter and the delta-sigma modulator. For example, if the external digital filter is 8 × oversampling, and the user selects OS[1:0] = 0, then the delta-sigma modulator oversamples by 8 ×, resulting in an effective oversampling rate of 64 ×. ZFGx Zero-Detect Flag where x = L or R, corresponding to the DAC output channel. These bits are available only for read-back. Default value: 00 ZFGx = 0 Not ZERO ZFGx = 1 ZERO detected When the PCM1738 detects that audio input data is continuously zero for 1024 WDCKs, the ZFGx bit is set to 1 for the corresponding channel(s). Zero-detect flags are also available at ZEROL (pin 2) and ZEROR (pin 3). 35 Submit Documentation Feedback |
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