STM32WBA62CG datasheet(52/185 Pages) STMICROELECTRONICS

52 / 185 page

Functional overview

STM32WBA6xxx

52/185

DS14736 Rev 1

The true random generator:

•

Delivers 32-bit true random numbers, produced by an analog entropy source

conditioned by a NIST SP800-90B approved conditioning stage

•

Can be used as entropy source to construct a nondeterministic random bit generator

(NDRBG)

•

Produces four 32-bit random samples every 412 AHB clock cycles if fAHB < 77 MHz

(256 RNG clock cycles otherwise)

•

Embeds start-up and NIST SP800-90B approved continuous health tests (repetition

count and adaptive proportion tests), associated with specific error management

•

Can be disabled to reduce power consumption, or enabled with an automatic

low-power mode (default configuration)

•

Has an AHB slave peripheral, accessible through 32-bit word single accesses only

(else an AHB bus error is generated, and the write accesses are ignored)

3.25

Secure advanced encryption standard hardware accelerator

(SAES) and encryption standard hardware accelerator (AES)

The devices embed two AES accelerators: SAES and AES. The SAES with hardware

unique key embeds protection against differential power analysis (DPA) and related side

channel attacks. The SAES can share its current key register information with the faster

AES using a dedicated hardware bus.

The SAES and the AES can be used to both encrypt and decrypt data using the AES

algorithm. It is a fully compliant implementation of the advanced encryption standard (AES)

as defined by Federal Information Processing Standards Publication (FIPS PUB 197, Nov

2001).

Multiple chaining modes are supported for key sizes of 128 or 256 bits. ECB, CBC, CTR,

CCM, GCM and GMAC chaining is supported by both SAES and AES.

SAES and AES support DMA single transfers for incoming and outgoing data (two DMA

channels required).

The SAES supports the selection of all the following key sources, while the AES support

only the first:

•

256-bit software key, written by the application in the key registers (write only)

•

256-bit DHUK (derived hardware unique key), computed inside the SAES engine from

a nonvolatile OTP based RHUK (root hardware unique key)

•

256-bit BHK (boot hardware key), stored in tamper-resistant secure backup registers,

written by a secure code during boot. Once written, this key cannot be read or write by

any application until the next product reset.

•

XOR of DHUK (provisioned chip secret) and BHK (software secret)

DHUK, BHK and their XOR are not visible by any software (even secure).

Note:

128-bit key size can also be selected.

BHK key is cleared in case of tamper or RDP regression.

When the SAES is secure (respectively nonsecure), DHUK secure (respectively nonsecure)

is used.

STM32WBA62CG Datasheet(PDF) 52 Page - STMicroelectronics

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