STM32WBA62CG datasheet(41/185 Pages) STMICROELECTRONICS

41 / 185 page

DS14736 Rev 1

41/185

STM32WBA6xxx

Functional overview

•

Device reset source monitoring.

•

Individual peripheral reset control.

•

Clock prescaler: to get the best trade-off between speed and current consumption, the

clock frequency to the CPU and peripherals can be adjusted by a programmable

prescaler.

•

Clock selection system: clock sources can be changed safely on-the-fly in Run mode

through a configuration register.

•

Clock management: in order to reduce the power consumption, the clock controller can

stop the clock to the core, individual peripherals or memory.

•

System clock source: different clock sources can be used to drive the system clock

SYSCLK:

–

HSE32 (32 MHz high-speed external crystal oscillator), trimmable by software.

The HSE32 can also be used with an external clock.

–

HSI16 (16 MHz high-speed internal RC oscillator), trimmable by software.

–

System PLL, can be fed by HSE32 or HSI16 with a maximum output frequency at

100 MHz.

•

Auxiliary clock source: two ultra-low-power clock sources that can be used to drive e.g.

the real-time clock:

–

LSE (32.000 kHz or 32.768 kHz low-speed external crystal oscillator), supporting

programmable drive capability modes. The LSE can also be configured in bypass

mode for an external clock.

–

LSI (~32 kHz low-speed internal RC oscillators), also used to drive the

independent watchdog.

The LSI1 clock absolute accuracy is ±5%, it can be divided by 128 to output a

250 Hz source clock.

The LSI2 clock has a high stability, ±500 ppm. It can be used to drive the 2.4 GHz

RADIO sleep timer.

•

Peripheral clock sources: several peripherals have their own independent kernel clock

whatever the system clock. The PLL has three independent outputs allowing the

highest flexibility and can generate clocks for the ADC, SAI, USB OTG and the RNG.

•

Startup clock: after reset, the microcontroller restarts by default with the HSI16. The

prescaler ratio and clock source can be changed by the application program as soon

as the code execution starts.

•

CSS (Clock security systems): these features can be enabled by software.

–

If a HSE32 clock failure occurs, the system clock automatically switches to HSI16

and a software interrupt is generated if enabled.

–

LSE failure can also be detected and generates an interrupt, in this case the clock

switches to LSI.

•

Clock-out capability:

–

MCO (microcontroller clock output): outputs one of the internal clocks for external

use by the application. (only available in Run, Sleep and Stop mode)

–

LSCO (low-speed clock output): outputs LSI or LSE in all operating modes.

Several prescalers allow AHB and APB frequencies configuration. The maximum frequency

of the AHB and the APB clock domains is 100 MHz, except for AHB5 domain, which is

limited to maximum 32 MHz.

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