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STM32WBA62CG Datasheet(PDF) 57 Page - STMicroelectronics

Part # STM32WBA62CG
Description  Multiprotocol wireless 32-bit MCU Arm®-based Cortex®-M33 with TrustZone , FPU, Bluetooth IEEE802.15.4 radio solution
PDF  185 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32WBA62CG Datasheet(HTML) 57 Page - STMicroelectronics

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DS14736 Rev 1
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STM32WBA6xxx
Functional overview
69
3.28.2
General-purpose timers (TIM2, TIM3, TIM4, TIM16, TIM17)
There are up to five synchronizable general-purpose timers embedded in the device (see
Table 17 for differences). Each general-purpose timer can be used to generate PWM
outputs, or act as a simple time base.
•
TIM2, TIM3 and TIM4
–
They are full-featured general-purpose timers with TIM2 and TIM4 32-bit auto-
reload up/downcounter, TIM3 16-bit auto-reload up/downcounter, all with 16-bit
prescaler.
–
These timers feature four independent channels for input capture/output compare,
PWM or one-pulse mode output. They can work together, or with the other
general-purpose timers via the Timer Link feature for synchronization or event
chaining.
–
The counters can be frozen in Debug mode.
–
All have independent DMA request generation and support quadrature encoders.
•
TIM16 and 17
–
They are general-purpose timers with mid-range features.
–
They have 16-bit auto-reload upcounters and 16-bit prescalers. and have one
channel and one complementary channel.
–
All channels can be used for input capture/output compare, PWM or one-pulse
mode output.
–
The timers can work together via the Timer Link feature for synchronization or
event chaining. The timers have independent DMA request generation.
–
The counters can be frozen in Debug mode.
–
All have independent DMA request generation.
3.28.3
Low-power timers (LPTIM1, LPTIM2)
The devices embed two low-power timers. These timers have an independent clock and are
running in Stop mode if they are clocked by HSI16, LSE, LSI or an external clock. They are
able to wake up the system from Stop mode.
LPTIM1, LPTIM2 are active in Stop modes. Only LPTIM1 is active in Stop 2 mode.
The low-power timer supports the following features:
•
16-bit up counter with 16-bit autoreload register
•
3-bit prescaler with following possible dividing factors (1, 2, 4, 8, 16, 32, 64, 128)
•
Selectable clock
–
Internal clock sources: LSE, LSI, HSI16 or APB clock
–
External clock source over LPTIM input (working with no LP oscillator running,
used by Pulse Counter application)
•
16-bit ARR autoreload register
•
16-bit capture/compare register
•
Continuous/One-shot mode
•
Selectable software/hardware input trigger
•
Programmable digital glitch filter
•
Configurable output: pulse, PWM
•
Configurable I/O polarity



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