STM32WBA62CG datasheet(36/185 Pages) STMICROELECTRONICS

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Functional overview

STM32WBA6xxx

36/185

DS14736 Rev 1

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Standby retention and Standby modes

The Standby mode is used to achieve the lowest power consumption. The internal

regulator is switched off so that the VCORE domain is powered off. The PLL, the HSI16

and the HSE32 crystal oscillators are also switched off. The LSE or LSI is still running.

The RTC and IWDG can remain active.

The BOR always remains active in Standby mode.

The BOR can be configured in ultra-low-power mode to further reduce power

consumption during Standby mode.

The state of each I/O during Standby mode can be retained with internal pull-up,

internal pull-down or floating.

After entering Standby mode, SRAMs and register contents are lost except for registers

in the Backup domain and Standby circuitry. Optionally, the full SRAM1 and/or SRAM2

can be retained in Standby mode, supplied by the low-power regulator (Standby with

RAM retention mode). Also optionally the 2.4 GHz RADIO can be retained in Standby

mode, supplied by the low-power regulator (Standby with 2.4 GHz RADIO retention

mode).

The device exits Standby modes when an external reset (NRST pin), an IWDG event or

reset, WKUP pin event (configurable rising or falling edge), an RTC event occurs

(alarm, periodic wake-up, timestamp), or a tamper detection. The tamper detection can

be raised either due to external pins or due to an internal failure detection.

When in Standby with 2.4 GHz RADIO retention mode also the SLEEP_TIMER can exit

the device from Standby mode.

The system clock after wake-up is HSI16.

PWR background autonomous mode (BAM)

The devices support BAM (background autonomous mode), that allows peripherals to be

functional and autonomous in Stop mode (Stop 0, Stop 1 and Stop 2 modes), so without any

software running.

In Stop 0 modes, the autonomous peripherals are the following: ADC4, LPTIMx (x = 1, 2),

USARTx (x = 1..3), LPUART1, SPIx (x = 1..3), I2Cx (x = 1..4), 2.4 GHz RADIO and

GPDMA1. In this mode the GPDMA1 can be used to transfer data or control peripherals and

access SRAM1 and SRAM2. The ADC4 can also be used to measure temperature. The 2.4

GHz RADIO is only autonomous in Stop 0 range 1.

In Stop 1 mode, the autonomous peripherals are the following: ADC4, LPTIMx (x = 1, 2),

USARTx (x = 1..3), LPUART1, SPIx (x = 1..3), I2Cx (x = 1..4). These peripherals can

request a transition to Stop 0 mode allowing then data transfers with GPDMA1.

In Stop 2 mode, the autonomous peripherals are the following: LPTIM1, LPUART1, SPI3,

I2C3. These peripherals can request a transition to Run mode allowing then data transfers.

Those peripherals support the features detailed below:

•

Functionality in Stop mode thanks to its own independent clock (named kernel clock)

request capability: the peripheral kernel clock is automatically switched on when

requested by a peripheral, and automatically switched off when no peripheral

requests it.

•

DMA transfers supported in Stop 0 mode thanks to system clock request capability: the

system clock (HSI16) automatically switched on when requested by a peripheral, and

automatically switched off when no peripheral requests it. When the system clock is

requested by an autonomous peripheral, Stop 0 mode is automatically entered and the

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