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STM32WBA62CGF6 Datasheet(PDF) 103 Page - STMicroelectronics |
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STM32WBA62CGF6 Datasheet(HTML) 103 Page - STMicroelectronics |
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103 / 185 page ![]() DS14736 Rev 1 103/185 STM32WBA6xxx Electrical characteristics 169 VDDA Analog supply voltage ADC used 1.62 - 3.6 V COMP used 1.58 - ADC, COMP not used 0 - VDDRF RF operating voltage - 1.71 - 3.6 V VDDRFPA RF power amplifier operating voltage VDDRFPA supply must be equal or lower than VDDRF. 1.15 - 3.6 V VDDANA RF analog supply VDDANA supply must be equal or lower than VDDRF. 1.15 - 3.6 V VIN I/O input voltage All I/Os FT_ (any option) pins -0.3 - min (min (VDD, VDDIO2, VDDA) + 3.6, 5.5)(2)(3) TT I/O pins VDD + 0.3 VCORE Internal regulator ON Range 1 1.15 1.21 1.27 Range 2 0.81 0.90 0.99 fHCLK Internal AHB1, AHB2, and AHB4 clock frequency Range 1 - - 100 MHz Range 2 - - 16 fPCLK Internal APB1, APB2, and APB7 clock frequency Range 1 - - 100 Range 2 - - 16 fHCLK5 Internal AHB5 clock frequency Range 1 - - 32 Range 2 - - 12 ∆fHCLK1 Internal AHB1, AHB2 and AHB4 clock incremental frequency step(4) -- - 84 MHz PD Power dissipation at TA = 85 °C (suffix 6 version) or TA = 105 °C (suffix 7 version) See Section 6.6 for appropriate thermal resistance and package. Power dissipation is calculated according to ambient temperature (TA), maximum junction temperature (TJ), and selected thermal resistance. mW TA Ambient temperature (suffix 6 version) Max power dissipation –40 - 85 °C Low-power dissipation(5) 105 Ambient temperature (suffix 7 version) Max power dissipation –40 - 105 Low-power dissipation(5) 125 TJ Junction temperature range Suffix 6 version –40 - 105 °C Suffix 7 version(6) 125 1. When RESET is released functionality is guaranteed down to VBORx min. 2. Applies only on the power supplies related to the I/O structure described by the pin definition table. The maximum I/O input voltage is the smallest value between min (VDD, VDDIO2, VDDA, VDDUSB) +3.6 V and 5.5 V. 3. For operation with voltages higher than min (VDD, VDDIO2, VDDA, VDDUSB) +3.6 V the internal pull-up and pull-down resistors must be disabled. 4. Without system clock frequency step limiting. Table 30. General operating conditions (continued) Symbol Parameter Conditions Min Typ Max Unit |
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