STM32WBA62CGF6 datasheet(151/185 Pages) STMICROELECTRONICS

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DS14736 Rev 1

151/185

STM32WBA6xxx

Electrical characteristics

169

Figure 27. ADC accuracy characteristics

6 bits

(continued)

22000

1250

79.5

33000

1853

814.5

47000

2607

814.5

1. Specified by design, not tested in production.

2. BOOSTEN and ANASWVDD configured according to VDD and VDDA levels.

3. Values without external capacitance.

Table 84. Maximum RAIN for 12-bit ADC4(1)(2)(3) (continued)

Resolution

RAIN (Ω)

Sampling time (ns)

Sampling cycles at 35 MHz

Sampling cycles at 55 MHz

Table 85. 12-bit ADC4 accuracy(1)(2)(3)

1. Evaluated by characterization, not tested in production.

2. DC accuracy values are measured after internal calibration.

3. The I/O analog switch voltage booster is enabled when VDDA < 2.4 V (resolution = 12 bits, no

oversampling).

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Total unadjusted error

-±3

±7.5

LSB

Offset error

±2

±5.5

Gain error

±2

±6.5

Differential linearity error

-0.9/+1.0 -0.9/+1.5

Integral linearity error

±2

±3.5

ENOB

Effective number of bits

9.9

10.9

bits

SINAD

Signal-to-noise and distortion ratio

61.4

67.4

SNR

Signal-to-noise ratio

61.6

67.5

THD

Total harmonic distortion

-74

-70

MSv19880V6

(1) Example of an actual transfer curve

(2) Ideal transfer curve

(3) End-point correlation line

n = ADC resolution

ET = total unadjusted error: maximum deviation

between the actual and ideal transfer curves

EO = offset error: maximum deviation between the first

actual transition and the first ideal one

EG = gain error: deviation between the last ideal

transition and the last actual one

ED = differential linearity error: maximum deviation

between actual steps and the ideal one

EL = integral linearity error: maximum deviation between

any actual transition and the end point correlation line

n-1

Output code

VSSA

n-2

n-3

VREF+ (VDDA)

1 LSB ideal

(1)

(2)

(3)

(or

)]

[1LSB =

VDDA

VREF+

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