R5F2L3ACBNFP datasheet(122/848 Pages) RENESAS

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7. I/O Ports

REJ09B0441-0010 Rev.0.10

Jul 30, 2008

Page 86 of 809

Under development Preliminary specification

Specifications in this manual are tentative and subject to change.

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,

R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group

7.4.2

Port Pi Register (Pi) (i = 0 to 7, 10 to 13)

Notes:

1. Bits PD5_4 to PD5_7 in the PD5 register are unavailable on this MCU.

If it is necessary to set bits PD5_4 to PD5_7, set to 0. When read, the content is 0.

2. Bits PD12_4 to PD12_7 in the PD12 register are unavailable on this MCU.

If it is necessary to set bits PD12_4 to PD12_7, set to 0. When read, the content is 0.

Data input and output to and from external devices are accomplished by reading and writing to the Pi register.

The Pi register consists of a port latch to retain output data and a circuit to read the pin status. The value written

in the port latch is output from the pin. Each bit in the Pi register corresponds to one port.

Pi_j Bit (i = 0 to 7, 10 to 13, j = 0 to 7) (Port Pi_0 Bit)

The pin level of any I/O port which is set to input mode can be read by reading the corresponding bit in this

corresponding bit in this register.

Address 00E0h (P0), 00E1h (P1), 00E4h (P2), 00E5h (P3),

00E8h (P4 (1)), 00E9h (P5 (2)), 00ECh(P6), 00EDh (P7),

00F4h (P10), 00F5h (P11), 00F8h (P12), 00F9h (P13),

Bit

b7b6

b5b4b3b2

Symbol

Pi_7

Pi_6

Pi_5

Pi_4

Pi_3

Pi_2

Pi_1

Pi_0

After Reset

XXX

XXXX

Bit

Symbol

Bit Name

Function

R/W

Pi_0

Port Pi_0 bit

0: Low level

1: High level

R/W

Pi_1

Port Pi_1 bit

R/W

Pi_2

Port Pi_2 bit

R/W

Pi_3

Port Pi_3 bit

R/W

Pi_4

Port Pi_4 bit

R/W

Pi_5

Port Pi_5 bit

R/W

Pi_6

Port Pi_6 bit

R/W

Pi_7

Port Pi_7 bit

R/W

R5F2L3ACBNFP Datasheet(PDF) 122 Page - Renesas Technology Corp

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