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R5F2L3ACBNFP Datasheet(PDF) 154 Page - Renesas Technology Corp |
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R5F2L3ACBNFP Datasheet(HTML) 154 Page - Renesas Technology Corp |
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154 / 848 page  7. I/O Ports REJ09B0441-0010 Rev.0.10 Jul 30, 2008 Page 118 of 809 Under development Preliminary specification Specifications in this manual are tentative and subject to change. R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group, R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group X: 0 or 1; —: No change in outcome Notes: 1. Pulled up by setting the corresponding bit in the P11PUR register to 1. 2. Output drive capacity high by setting the corresponding bit in the P11DRR register to 1. 3. N-channel open-drain output by setting the SOOS bit in the SSMR2 register to 1 (N-channel open-drain output). 4. N-channel open-drain output by setting the NCH bit in the U2C0 register to 1. 5. N-channel open-drain output by setting the CSOS bit in the SSMR2 register to 1. 6. Synchronous serial communication unit (refer to Table 27.4 Association between Communication Modes and I/O Pins). Table 7.19 Ports P11_2 and P11_3 Pin Register PD11 INTSR INTEN INTCMP — SSUIICSR ICCR1 SSU Associated Register (6) U2SR0 U2MR U2SMR Function Bit PD11_i INTi SEL0 INTiEN INT3 CP0 —IICSEL ICE SSI output control SSI input control RXD2 SEL TXD2 SEL SMD IICM 10 10 2 1 0 Port P11_2 SDA SSO (RXD2 SCL2 TXD2 SDA2 INT2) IVREF3 i = 2 0X X X — 1 0 X X X X Other than 01b XXX 0 Input port (1) 0 X X X — 0 X 0 0 X X XXX 0 1X X X — 1 0 X X X X Other than 01b XXX 0 Output port (2) 1 X X X — 0 X 0 0 X X XXX 0 0X X X — 1 1 X X X X Other than 01b XXX 0 SDA input/output (2) 0 X X X — 0 X 0 1 X X XXX 0 SSO input (1) 0 X X X — 0 X 1 0 X X XXX 0 SSO output (2, 3) 0X X X — 10 X X 10 Other than 01b XXX 0 RXD2 input (1) 0X 0 0 0X X X — 10 X X 10 Other than 01b 01 0 1 SCL2 input/output (2, 4) 0X 0 0 0 XX X — 1 0 X X XX 0 1 00 1 0 TXD2 output (2, 4) XX X — 0 X 0 0 10 X 11 0 0X X X — 10 X X XX 0 1 01 0 1 SDA2 input/outpu (2, 4) 0X 0 0 01 1 X — X X 0 0 X X 0 1 XXX X INT2 input (1) 0X X 1 — X X 0 0 X X Other than 01b XXX X Comparator B3 reference voltage input (IVREF3) Pin Register PD11 INTSR INTEN INTCMP —— SSMR2 U2CO U2SR1 U2MR — Function Bit PD11_i INTi SEL0 INTiEN INT3 CP0 —— CSS CRS CRD CTSSEL0 SMD 10 2 1 0 Port P11_3 SCS (CTS2 RTS2 INT3) IVCMP3 i = 3 0 X X X — — 0 0 X X 0 XXX Input port (1) 1 X X X — — 0 0 X X 0 XXX Output port (2) X X X X — — 0 1 X X X XXX SCS input (1) X X X X — — 1 X X X X XXX SCS output (2, 5) 0X X X — — 0 0 0 0 1 Other than 000b CTS2 input (1) 0X X X — — 0 0 1 0 1 RTS2 output (2) 0 1 1 0 — — 0 0 X X 0 XXX INT3 input (1) 0 0 1 1 — — 0 0 X X 0 XXX Comparator B3 input (IVCMP3) |
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