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R5F2L3ACBNFP Datasheet(PDF) 191 Page - Renesas Technology Corp |
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R5F2L3ACBNFP Datasheet(HTML) 191 Page - Renesas Technology Corp |
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191 / 848 page ![]() REJ09B0441-0010 Rev.0.10 Jul 30, 2008 Page 155 of 809 Under development Preliminary specification Specifications in this manual are tentative and subject to change. 10. Power Control R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group, R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group 10.4 Wait Mode Since the CPU clock stops in wait mode, CPU operation using the CPU clock and watchdog timer operation with count source protection mode disabled are halted. However, the XIN clock, XCIN clock, and on-chip oscillator clock do not stop, so peripheral functions using these clocks continue operating. 10.4.1 Peripheral Function Clock Stop Function The peripheral function clock to stop in wait mode can be selected by setting bits CM01 and CM02 in the CM0 register (peripheral function clock stop bits in wait mode). This controls power consumption according to applications. 10.4.2 Entering Wait Mode The MCU enters wait mode by executing the WAIT instruction or setting the CM30 bit in the CM3 register to 1 (MCU enters wait mode). When the OCD2 bit in the OCD register is set to 1 (on-chip oscillator selected as system clock), set the OCD1 bit in the OCD register to 0 (oscillation stop detection interrupt disabled) before executing the WAIT instruction or setting the CM30 bit in the CM3 register to 1 (MCU enters wait mode). If the MCU enters wait mode while the OCD1 bit is set to 1 (oscillation stop detection interrupt enabled), current consumption is not reduced because the CPU clock does not stop. 10.4.3 Pin Status in Wait Mode Each I/O port retains its states immediately before the MCU enters wait mode. |
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