R5F2L3ACBNFP datasheet(201/848 Pages) RENESAS

201 / 848 page

REJ09B0441-0010 Rev.0.10

Jul 30, 2008

Page 165 of 809

Under development Preliminary specification

Specifications in this manual are tentative and subject to change.

10. Power Control

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,

R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group

10.7.10 Stopping Flash Memory

In low-speed on-chip oscillator mode and low-speed clock mode, power consumption can be further reduced by

stopping the flash memory using the FMSTP bit in the FMR0 register.

Access to the flash memory is disabled by setting the FMSTP bit to 1 (flash memory stops). The FMSTP bit

must be written to by a program transferred to RAM.

When the MUC enters stop mode or wait mode while CPU rewrite mode is disabled, the power for the flash

memory is automatically turned off. It is turned back on again after the MCU exit stop mode or wait mode. This

eliminates the need to set the FMR0 register.

Figure 10.8 shows the Handling Procedure Example for Reducing Power Consumption Using FMSTP Bit.

Figure 10.8

Handling Procedure Example for Reducing Power Consumption Using FMSTP Bit

FMSTP bit setting program

Transfer the FMSTP bit setting program to RAM

Jump to the FMSTP bit setting program

(The subsequent processing is executed by

the program in the RAM)

After writing 0 to the FMR01 bit,

write 1 (CPU rewrite mode enabled)

Enter low-speed clock mode or

low-speed on-chip oscillator mode

Process in low-speed clock mode or

low-speed on-chip oscillator mode

Write 0 to the FMR01 bit

(CPU rewrite mode disabled)

Jump to the specified address in the flash memory

Notes:

1. After setting the FMR01 bit to 1 (CPU rewrite mode enabled),

set the FMSTP bit to 1 (flash memory stops).

2. Before switching the CPU clock source, make sure the designated

clock is stable.

3. Insert a wait time of 60

µs by a program.

Do not access the flash memory during this wait time.

Write 1 to the FMSTP bit (flash memory stops.

low power consumption state) (1)

Wait until the flash memory circuit stabilizes

(60

µs) (3)

Write 0 to the FMSTP bit

(flash memory operates)

Switch the clock source for the CPU clock (2)

FMR01, FMSTP: Bits in FMR0 register

Stop the high-speed on-chip oscillator

R5F2L3ACBNFP Datasheet(PDF) 201 Page - Renesas Technology Corp

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