SH7713 datasheet(89/904 Pages) RENESAS

Part #	SH7713

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

PDF	904 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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Section 2 CPU

Rev.1.50 Aug. 30, 2006 Page 49 of 860

REJ09B0288-0150

Table 2.4

CPU Instruction Formats

Instruction Format

Source

Operand

Destination

Operand

Sample Instruction

0 type

xxxx xxxx xxxx xxxx

—

NOP

n type

xxxx nnnn xxxx xxxx

—

nnnn: register

direct

MOVT

Control register or

system register

nnnn: register

direct

STS

MACH,Rn

Control register or

system register

nnnn: pre-

decrement register

indirect

STC.L

SR,@-Rn

m type

xxxx mmmm xxxx xxxx

mmmm: register

direct

Control register or

system register

LDC

Rm,SR

mmmm: post-

increment register

indirect

Control register or

system register

LDC.L

@Rm+,SR

mmmm: register

indirect

—

JMP

@Rm

PC-relative using

—

BRAF

nm type

xxxx nnnn mmmm xxxx

mmmm: register

direct

nnnn: register

direct

ADD

Rm,Rn

mmmm: register

indirect

nnnn: register

indirect

MOV.L Rm,@Rn

mmmm: post-

increment register

indirect (multiply-

and-accumulate

operation)

nnnn: * post-

increment register

indirect (multiply-

and-accumulate

operation)

MACH, MACL

MAC.W @Rm+,@Rn+

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