SH7713 datasheet(92/904 Pages) RENESAS

Part #	SH7713

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

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Manufacturer	RENESAS [Renesas Technology Corp]

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Section 2 CPU

Rev.1.50 Aug. 30, 2006 Page 52 of 860

REJ09B0288-0150

2.6

Instruction Set

2.6.1

CPU Instruction Set Based on Functions

The CPU instruction set consists of 68 basic instruction types divided into six functional groups,

as shown in table 2.5. Tables 2.6 to 2.11 show the instruction notation, machine code, execution

time, and function.

Table 2.5

CPU Instruction Types

Type

Kinds of

Instruction

Op Code

Function

Number of

Instructions

MOV

Data transfer

Immediate data transfer

Peripheral module data transfer

Structure data transfer

MOVA

Effective address transfer

MOVT

T bit transfer

SWAP

Upper/lower swap

Data transfer

instructions

XTRCT

Extraction of middle of linked registers

ADD

Binary addition

ADDC

Binary addition with carry

ADDV

Binary addition with overflow check

CMP/cond

Comparison

DIV1

Division

DIV0S

Signed division initialization

DIV0U

Unsigned division initialization

DMULS

Signed double-precision multiplication

DMULU

Unsigned double-precision

multiplication

Decrement and test

EXTS

Sign extension

Arithmetic

operation

instructions

EXTU

Zero extension

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