AT90SCR100 datasheet(175/433 Pages) ATMEL

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TPR0327AY–SMS–30Jan09

AT90SCR100

• If the bit is set (one), the transfer will be from the RAM memory to the selected endpoint

(emission mode).

• If the bit is cleared (zero), the transfer will be from the selected endpoint to the RAM memory

(receiving mode).

• Bit 0 - USBDMAR : USB DMA Run Bit

This bit is set (one) by software and cleared (zero) by hardware.

This bit controls the USBDMA operation launching.

It is set (one) by software when a USBDMA operation is to be performed.

It is cleared (zero) by hardware at the end of the operation.

14.9.2

USBDMAD - USBDMA ADdress Registers

• Bits 15..14 - Res : Reserved Bits

These bits are reserved bits in the AT90SCR100 and are always read as zero.

• Bits 13..0 - USBDMAD13..0 : DMA Address

These bits represents the 14-bit USBDMA Address.

These two registers set the base address in RAM. This address represents the source of the

data to be sent if the USBDMA controller is configured in the emission mode. It represents the

destination to store the data if the USBDMA controller is configured in the receiving mode.

The initial value corresponds to RAM address $000100.

You can address the whole RAM with this parameter. Values in RAM that must not be dumped,

shall be stored out of the USBDMA RAM accessible range.

When starting a USBDMA operation, the hardware will check if the values of USBDMADH, USB-

DMADL and USBDMAB registers does not exceed the specific RAM area ($000100 to

$0010FF). If an error is detected, USBDMACS.DMAERR bit is automatically set (one). A Super-

The software does not need to poll this bit in order to detect the end of the USB-

DMA operation. Indeed, when the USBDMACS.DMAR bit is set by the software,

the AVR is automatically stopped. When the end of the USBDMA operation is

reached, the AVR then automatically executes the instructions following the set-

ting of the bit USBDMACS.DMAR.

A USBDMA operation can not be interrupted because the CPU is not available

during this time.

Note

Bit

$0000EC

USBDMAD [13..8]

USBDMADH

$0000EB

USBDMAD [7..0]

USBDMADL

Bit

Read/write

R/W

Initial value

0x01

0x00

AT90SCR100 Datasheet(PDF) 175 Page - ATMEL Corporation

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