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AT90SCR100 Datasheet(PDF) 171 Page - ATMEL Corporation |
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AT90SCR100 Datasheet(HTML) 171 Page - ATMEL Corporation |
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171 / 433 page  171 TPR0327AY–SMS–30Jan09 AT90SCR100 3. Wait for USBRSE.RSTEn to be cleared (zero) by hardware (polling). 14.8.11 USBGS - USB Global State Register • Bits 7..4 - Res : Reserved Bits These bits are reserved bits in the AT90SCR100 and are always read as zero. • Bits 3 - RSMON : Resume Signal ON This bit is set and cleared by hardware. Set by hardware when a resume is sent to the USB host during remote wake-up sequence. Automatically cleared when the resume signal emission is halted (last ~13ms). • Bits 2 - RMWUE : Remote Wake-Up Enable This bit is set and cleared by software. Set this bit to enable the remote wake-up feature. • Bit 1 - FCF : Function Configured Flag Bit This bit is cleared (zero) by the hardware when a USB Reset signaling is received. The software must set (one) this bit after receiving a valid SET_CONFIGURATION request from the host unless it is equal to zero. The software must clear (zero) this bit after receiving a valid SET_CONFIGURATION request from the host with a zero value. • Bit 0 - FAF : Function Addressed Flag Bit This bit is cleared (zero) by the hardware when a USB Reset signaling is received. The software must set (one) this bit after receiving a valid SET_ADDRESS request from the host. 14.8.12 USBFA - USB Function Address Register • Bit 7 - Res : Reserved Bit : This bit is reserved bit in the AT90SCR100 and is always read as zero. • Bits 6..0 - FADD6..0 : Function Address Register 6..0 Bits These bits are cleared (zero) by the hardware when a USB Reset is received. Bit 7654 3 2 10 $0000E6 ---- RSMON RMWUE FCF FAF USBGS Read/write RRRR R R/W R/W R/W Initial value 0000 0 0 00 0x00 Bit 7654 3 2 1 0 $0000E7 - FADD6 FADD5 FADD4 FADD3 FADD2 FADD1 FADD0 USBFA Read/write R R/W R/W R/W R/W R/W R/W R/W Initial value 0000 0 0 0 0 0x00 |
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