AT90SCR100 datasheet(170/433 Pages) ATMEL

170 / 433 page

170

TPR0327AY–SMS–30Jan09

AT90SCR100

At USB reset, EPE for endpoint 0 (USBFCEX.EPE for USBENUM=0) is automatically set by

hardware.

• Bits 6..3 - Res : Reserved Bits

These bits are reserved bits in the AT90SCR100 and are always read as zero.

• Bit 2- EPDIR : Endpoint Direction Bit

This bit is set (one) and cleared (zero) by software.

This bit indicates the direction of the endpoint and is not valid for endpoints operating in Control

transfer mode as this type of transfer occurs in both direction.

If it is set (one), the endpoint direction is IN.

If it is cleared (zero), the endpoint direction is OUT.

• Bits 1..0 - EPTYP0 EPTYP1 : Endpoint Type Bits

These bits are set (one) and cleared (zero) by software.

These bit indicate the type of USB data transfer of the corresponding endpoint. See table below

for the values available:

14.8.10

USBRSTE - USB Reset Endpoint Register

• Bits 7..0 - RSTE7..0 : Reset Endpoint 7..0 Bits

These bits are set (one) by software and cleared (zero) by hardware.

Each endpoint has its corresponding bit (e.g RSTE3 corresponds to the endpoint 3) which is

used to reset the endpoint.

When resetting an endpoint, the following actions are performed:

• Reset the DPRAM address pointers.

• Set the internal data toggle bit to zero.

To reset endpoint n (n=0..7), which is necessary when changing the device configuration and

recommended when receiving a USB bus Reset signaling (before starting the enumeration oper-

ations), the following procedure shall be applied:

1. Clear (zero) USBRSTE.RSTEn.

2. Set (one) bit USBRSTE.RSTEn.

Table 15-1 .

Endpoint Types Selection

EPTYP1

EPTYP0

Transfer

Control

Isochronous

Bulk

Interrupt

Bit

7654

$0000E5

RSTE7

RSTE6

RSTE5

RSTE4

RSTE3

RSTE2

RSTE1

RSTE0 USBRSTE

Read/write

R/W

Initial value

0000

0x00

AT90SCR100 Datasheet(PDF) 170 Page - ATMEL Corporation

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