AT90SCR100 datasheet(166/433 Pages) ATMEL

166 / 433 page

166

TPR0327AY–SMS–30Jan09

AT90SCR100

Cleared (zero) by software.

14.8.3

USBPIM - USB Protocol Interrupt Mask Register

See “USBPI - USB Protocol Interrupt register” on page 165.

• Bits 7..4 - Res : Reserved Bits

These bits are reserved bits in the AT90SCR100 and are always read as zero.

• Bit 3 - SOFIM : Start Of Frame Interrupt Mask Bit

When SOFIM is set (one) the Start Of Frame interrupt is enabled.

When SOFIM is cleared (zero) the Start Of Frame interrupt is masked.

• Bit 2 - RMWUIM : Remote Wake-Up Interrupt Mask Bit

When RMWUIM is set (one), the Remote WakeUp interrupt is enabled.

When RMWUIM is cleared (zero), the Remote WakeUp interrupt is disabled.

• Bit 1 - RESIM : Resume Interrupt Mask Bit

When RESIM is set (one) the Resume interrupt is enabled.

When RESIM is cleared (zero) the Resume interrupt is masked.

• Bit 0 - SUSIM : Suspend Interrupt Mask Bit

When SUSIM is set (one) the Suspend interrupt is enabled. When SUSIM is cleared (zero) the

Suspend interrupt is masked.

14.8.4

USBEI - USB Endpoint Interrupt Register

The following interrupt sources are all sources for the USB Endpoint interruption.

• Bit n - EPnI : Endpoint n Interrupt Bit (n=0..7)

This bit is set (one) by hardware when an endpoint interrupt condition has occurred on the end-

point n.

These bits can also be set (one) by software.

Note

Bit

7654

$0000E2

----

SOFIM

RMWUIM

RESIM

SUSIM

USBPIM

Read/write

RRRR

R/W

Initial value

0000

0x02

Bit

7654

$0000E3

EP7I

EP6I

EP5I

EP4I

EP3I

EP2I

EP1I

EP0I

USBEI

Read/write

RRRRR

Initial value

0000

0x00

AT90SCR100 Datasheet(PDF) 166 Page - ATMEL Corporation

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