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SPMCK16Z4MPV20 Datasheet(PDF) 265 Page - Freescale Semiconductor, Inc |
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SPMCK16Z4MPV20 Datasheet(HTML) 265 Page - Freescale Semiconductor, Inc |
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265 / 500 page ![]() M68HC16 Z SERIES GENERAL-PURPOSE TIMER USER’S MANUAL 11-1 SECTION 11 GENERAL-PURPOSE TIMER This section is an overview of the general-purpose timer (GPT) function. Refer to the GPT Reference Manual (GPTRM/AD) for complete information about the GPT mod- ule. 11.1 General The 11-channel general-purpose timer (GPT) is used in systems where a moderate level of CPU control is required. The GPT consists of a capture/compare unit, a pulse accumulator, and two pulse-width modulators. A bus interface unit connects the GPT to the intermodule bus (IMB). Figure 11-1 is a block diagram of the GPT. The capture/compare unit features three input capture channels, four output compare channels, and one channel that can be selected as input capture or output compare. These channels share a 16-bit free-running counter (TCNT) that derives its clock from a nine-stage prescaler or from the external clock input signal, PCLK. Pulse accumulator channel logic includes an 8-bit counter. The pulse accumulator can operate in either event counting mode or gated time accumulation mode. Pulse-width modulator outputs are periodic waveforms whose duty cycles can be in- dependently selected and modified by user software. The PWM circuits share a 16-bit free-running counter that can be clocked by the same nine-stage prescaler used by the capture/compare unit or by the PCLK input. All GPT pins can also be used for general-purpose input/output. The input capture and output compare pins form a bidirectional 8-bit parallel port (port GP). PWM pins are outputs only. PAI and PCLK pins are inputs only. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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