SPMCK16Z4MPV20 datasheet(268/500 Pages) FREESCALE

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GENERAL-PURPOSE TIMER

M68HC16 Z SERIES

11-4

USER’S MANUAL

11.3.3 Single-Step Mode

Two bits in GPTMCR support GPT debugging without using BDM. When the STOPP

bit is asserted, the prescaler and the pulse accumulator stop counting and changes at

input pins are ignored. Reads of the GPT pins return the state of the pin when STOPP

was set. After STOPP is set, the INCP bit can be set to increment the prescaler and

clock the input synchronizers once. The INCP bit is self-negating after the prescaler is

incremented. INCP can be set repeatedly. The INCP bit has no effect when the

STOPP bit is not set.

11.3.4 Test Mode

Test mode is used during Freescale factory testing. The GPT has no dedicated test-

mode control register; all GPT testing is done under control of the system integration

module.

11.4 Polled and Interrupt-Driven Operation

Normal GPT function can be polled or interrupt-driven. All GPT functions have an as-

sociated status flag and an associated interrupt. The timer interrupt flag registers

(TFLG1 and TFLG2) contain status flags used for polled and interrupt-driven opera-

tion. The timer mask registers (TMSK1 and TMSK2) contain interrupt control bits. Con-

trol routines can monitor GPT operation by polling the status registers. When an event

occurs, the control routine transfers control to a service routine that handles that event.

If interrupts are enabled for an event, the GPT requests interrupt service when the

event occurs. Using interrupts does not require continuously polling the status flags to

see if an event has taken place. However, to disable the interrupt request, status flags

must be cleared after an interrupt is serviced.

11.4.1 Polled Operation

When an event occurs in the GPT, that event sets a status flag in TFLG1 or TFLG2.

The GPT sets the flags; they cannot be set by the CPU. TFLG1 and TFLG2 are 8-bit

registers that can be accessed individually or as one 16-bit register. The registers are

initialized to zero at reset. Table 11-1 shows status flag assignment.

Freescale Semiconductor, Inc.

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SPMCK16Z4MPV20 Datasheet(PDF) 268 Page - Freescale Semiconductor, Inc