SPMCK16Z4MPV20 datasheet(442/500 Pages) FREESCALE

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M68HC16 Z SERIES

D-68

USER’S MANUAL

STOP — Stop Clocks

0 = GPT clock operates normally.

1 = GPT clock is stopped.

FRZ1 — Not Implemented

FRZ0 — FREEZE Assertion Response

0 = Ignore IMB FREEZE signal.

1 = FREEZE the current state of the GPT.

STOPP — Stop Prescaler

0 = Normal operation.

1 = Stop prescaler and pulse accumulator from incrementing. Ignore changes to

input pins.

INCP — Increment Prescaler

0 = Has no effect.

1 = If STOPP is asserted, increment prescaler once and clock input synchronizers

once.

SUPV — Supervisor/Unrestricted Data Space

This bit has no effect because the CPU16 always operates in supervisor mode.

IARB[3:0] — Interrupt Arbitration ID

The IARB field is used to arbitrate between simultaneous interrupt requests of the

same priority. Each module that can generate interrupt requests must be assigned a

unique, non-zero IARB field value.

D.8.2 GPT Test Register

GPTMTR — GPT Module Test Register

$YFF902

Used for factory test only.

D.8.3 GPT Interrupt Configuration Register

ICR fields determine internal and external interrupt priority, and provide the upper nib-

ble of the interrupt vector number supplied to the CPU when an interrupt is acknowl-

edged.

IPA[3:0] — Interrupt Priority Adjust

This field specifies which GPT interrupt source is given highest internal priority. Refer

to Table D-43.

ICR — GPT Interrupt Configuration Register

$YFF904

IPA[3:0]

IPL[2:0]

IVBA[3:0]

RESET:

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