| Electronic Components Datasheet Search |
|
SPMCK16Z4MPV20 Datasheet(PDF) 194 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
SPMCK16Z4MPV20 Datasheet(HTML) 194 Page - Freescale Semiconductor, Inc |
|
194 / 500 page ![]() ANALOG-TO-DIGITAL CONVERTER M68HC16 Z SERIES 8-8 USER’S MANUAL 8.7.5.1 Conversion Parameters Table 8-5 describes the conversion parameters controlled by bits in ADCTL1. 8.7.5.2 Conversion Modes Conversion modes are defined by the state of the SCAN, MULT, and S8CM bits in ADCTL1. Table 8-6 shows mode numbering. The following paragraphs describe each type of conversion mode: Mode 0 — A single four-conversion sequence is performed on a single input channel specified by the value in CD:CA. Each result is stored in a separate result register (RSLT0 to RSLT3). The appropriate CCF bit in ADCSTAT is set as each register is filled. The SCF bit in ADCSTAT is set when the conversion sequence is complete. Mode 1 — A single eight-conversion sequence is performed on a single input channel specified by the value in CD:CA. Each result is stored in a separate result register (RSLT0 to RSLT7). The appropriate CCF bit in ADCSTAT is set as each register is filled. The SCF bit in ADCSTAT is set when the conversion sequence is complete. Table 8-5 Conversion Parameters Controlled by ADCTL1 Conversion Parameter Description Conversion channel The value of the channel selection field (CD:CA) in ADCTL1 determines which multiplexer inputs are used in a conversion sequence. There are 16 possible inputs. Seven inputs are external pins (AN[6:0]), and nine are internal. Length of sequence A conversion sequence consists of either four or eight conversions. The number of conversions in a sequence is determined by the state of the S8CM bit in ADCTL1. Single or continuous conversion Conversion can be limited to a single sequence or a sequence can be performed continuously. The state of the SCAN bit in ADCTL1 deter- mines whether single or continuous conversion is performed. Single or multiple channel conversion Conversion sequence(s) can be run on a single channel or on a block of four or eight channels. Channel conversion is controlled by the state of the MULT bit in ADCTL1. Table 8-6 ADC Conversion Modes SCAN MULT S8CM Mode 000 0 001 1 010 2 011 3 100 4 101 5 110 6 111 7 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |