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PIC18LF4331 Datasheet(PDF) 64 Page - Microchip Technology |
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PIC18LF4331 Datasheet(HTML) 64 Page - Microchip Technology |
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64 / 392 page ![]() PIC18F2331/2431/4331/4431 DS39616D-page 64 2010 Microchip Technology Inc. 6.1.2.3 PUSH and POP Instructions Since the Top-of-Stack (TOS) is readable and writable, the ability to push values onto the stack and pull values off the stack without disturbing normal program execu- tion is a desirable option. To push the current PC value onto the stack, a PUSH instruction can be executed. This will increment the Stack Pointer and load the current PC value onto the stack. TOSU, TOSH and TOSL can then be modified to place data or a return address on the stack. The PUSH instruction places the current PC value onto the stack. This increments the Stack Pointer and loads the current PC value onto the stack. The POP instruc- tion discards the current TOS by decrementing the Stack Pointer. The previous value pushed onto the stack then becomes the TOS value. 6.1.2.4 Stack Full/Underflow Resets These Resets are enabled by programming the STVREN bit in Configuration Register 4L. When the STVREN bit is cleared, a full or underflow condition will set the appropriate STKFUL or STKUNF bit, but not cause a device Reset. When the STVREN bit is set, a full or underflow condition will set the appropriate STKFUL or STKUNF bit and then cause a device Reset. The STKFUL or STKUNF bits are cleared by the user software or a Power-on Reset. 6.1.3 FAST REGISTER STACK A Fast Register Stack is provided for the STATUS, WREG and BSR registers, to provide a “fast return” option for interrupts. The stack for each register is only one level deep and is neither readable nor writable. It is loaded with the current value of the corresponding register when the processor vectors for an interrupt. All interrupt sources will push values into the stack registers. The values in the registers are then loaded back into their associated registers if the RETFIE, FAST instruc- tion is used to return from the interrupt. If both low and high-priority interrupts are enabled, the stack registers cannot be used reliably to return from low-priority inter- rupts. If a high-priority interrupt occurs while servicing a low-priority interrupt, the stack register values stored by the low-priority interrupt will be overwritten. In these cases, users must save the key registers in software during a low-priority interrupt. If interrupt priority is not used, all interrupts may use the Fast Register Stack for returns from interrupt. If no interrupts are used, the Fast Register Stack can be used to restore the STATUS, WREG and BSR registers at the end of a subroutine call. To use the Fast Register Stack for a subroutine call, a CALL label, FAST instruction must be executed to save the STATUS, WREG and BSR registers to the Fast Register Stack. A RETURN , FAST instruction is then executed to restore these registers from the Fast Register Stack. Example 6-1 shows a source code example that uses the Fast Register Stack during a subroutine call and return. EXAMPLE 6-1: FAST REGISTER STACK CODE EXAMPLE 6.1.4 LOOK-UP TABLES IN PROGRAM MEMORY There may be programming situations that require the creation of data structures, or look-up tables, in program memory. For PIC18 devices, look-up tables can be implemented two ways: • Computed GOTO • Table Reads 6.1.4.1 Computed GOTO A computed GOTO is accomplished by adding an offset to the program counter. An example is shown in Example 6-2. A look-up table can be formed with an ADDWF PCL instruction and a group of RETLW nn instructions. The W register is loaded with an offset into the table before executing a call to that table. The first instruction of the called routine is the ADDWF PCL instruction. The next instruction executed will be one of the RETLW nn instructions that returns the value “nn” to the calling function. The offset value (in WREG) specifies the number of bytes that the program counter should advance and should be multiples of 2 (LSb = 0). In this method, only one data byte can be stored in each instruction location and room on the return address stack is required. EXAMPLE 6-2: COMPUTED GOTO USING AN OFFSET VALUE CALL SUB1, FAST ;STATUS, WREG, BSR ;SAVED IN FAST REGISTER ;STACK SUB1 RETURN FAST ;RESTORE VALUES SAVED ;IN FAST REGISTER STACK MOVFW OFFSET CALL TABLE ORG 0xnn00 TABLE ADDWF PCL RETLW 0xnn RETLW 0xnn RETLW 0xnn . . . |
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