PIC18LF4331 datasheet(66/392 Pages) MICROCHIP

66 / 392 page

PIC18F2331/2431/4331/4431

DS39616D-page 66

 2010 Microchip Technology Inc.

6.4

Instructions in Program Memory

The program memory is addressed in bytes. Instructions

are stored as two bytes or four bytes in program memory.

The Least Significant Byte of an instruction word is

always stored in a program memory location with an

even address (LSB = 0). Figure 6-5 shows an example of

how instruction words are stored in the program memory.

To maintain alignment with instruction boundaries, the

PC increments in steps of 2 and the LSB will always read

‘0’.

The CALL and GOTO instructions have the absolute

program memory address embedded into the instruction.

Since instructions are always stored on word boundaries,

the data contained in the instruction is a word address.

The word address is written to PC<20:1>, which

accesses the desired byte address in program memory.

Instruction 2 in Figure 6-5 shows how the instruction,

‘GOTO 000006h’, is encoded in the program memory.

Program branch instructions, which encode a relative

address offset, operate in the same manner. The offset

value stored in a branch instruction represents the num-

ber of single-word instructions that the PC will be offset

by. Section 24.0 “Instruction Set Summary” provides

further details of the instruction set.

6.4.1

TWO-WORD INSTRUCTIONS

The standard PIC18 instruction set has four two-word

instructions: CALL, MOVFF, GOTO and LSFR. In all

cases, the second word of the instructions always has

‘1111’ as its four Most Significant bits; the other 12 bits

are literal data, usually a data memory address.

The use of ‘1111’ in the four MSbs of an instruction

specifies a special form of NOP. If the instruction is exe-

cuted in proper sequence, immediately after the first

word, the data in the second word is accessed and

used by the instruction sequence. If the first word is

skipped for some reason and the second word is

executed by itself, a NOP is executed instead. This is

necessary for cases when the two-word instruction is

preceded by a conditional instruction that changes the

PC. Example 6-4 shows how this works.

FIGURE 6-5:

INSTRUCTIONS IN PROGRAM MEMORY

EXAMPLE 6-4:

TWO-WORD INSTRUCTIONS

Note:

For information on two-word instructions

in the extended instruction set, see

Section 24.2 “Instruction Set”.

CASE 1:

Object Code

Source Code

0110 0110 0000 0000

TSTFSZ

REG1

; is RAM location 0?

1100 0001 0010 0011

MOVFF

REG1, REG2

; No, skip this word

1111 0100 0101 0110

; Execute this word as a NOP

0010 0100 0000 0000

ADDWF

REG3

; continue code

CASE 2:

Object Code

Source Code

0110 0110 0000 0000

TSTFSZ

REG1

; is RAM location 0?

1100 0001 0010 0011

MOVFF

REG1, REG2

; Yes, execute this word

1111 0100 0101 0110

; 2nd word of instruction

0010 0100 0000 0000

ADDWF

REG3

; continue code

Word Address

LSB = 1

LSB = 0



Program Memory

Byte Locations



000000h

000002h

000004h

000006h

Instruction 1:

MOVLW

055h

0Fh

55h

000008h

Instruction 2:

GOTO

000006h

EFh

03h

00000Ah

F0h

00h

00000Ch

Instruction 3:

MOVFF

123h, 456h

C1h

23h

00000Eh

F4h

56h

000010h

000012h

000014h

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