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PIC18LF4331 Datasheet(PDF) 88 Page - Microchip Technology |
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PIC18LF4331 Datasheet(HTML) 88 Page - Microchip Technology |
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88 / 392 page ![]() PIC18F2331/2431/4331/4431 DS39616D-page 88 2010 Microchip Technology Inc. 8.2.2 TABLAT – TABLE LATCH REGISTER The Table Latch (TABLAT) is an 8-bit register mapped into the SFR space. The Table Latch is used to hold 8-bit data during data transfers between program memory and data RAM. 8.2.3 TBLPTR – TABLE POINTER REGISTER The Table Pointer (TBLPTR) addresses a byte within the program memory. The TBLPTR is comprised of three SFR registers: Table Pointer Upper Byte, Table Pointer High Byte and Table Pointer Low Byte (TBLPTRU:TBLPTRH:TBLPTRL). These three regis- ters join to form a 22-bit wide pointer. The low-order 21 bits allow the device to address up to 2 Mbytes of program memory space. Setting the 22nd bit allows access to the Device ID, the User ID and the Configuration bits. The TBLPTR is used by the TBLRD and TBLWT instruc- tions. These instructions can update the TBLPTR in one of four ways based on the table operation. These operations are shown in Table 8-1. These operations on the TBLPTR only affect the low-order 21 bits. 8.2.4 TABLE POINTER BOUNDARIES TBLPTR is used in reads, writes and erases of the Flash program memory. When a TBLRD is executed, all 22 bits of the Table Pointer determine which byte is read from program or configuration memory into TABLAT. When a TBLWT is executed, the three LSbs of the Table Pointer (TBLPTR<2:0>) determine which of the eight program memory holding registers is written to. When the timed write to program memory (long write) begins, the 19 MSbs of the Table Pointer, TBLPTR (TBLPTR<21:3>), will determine which program memory block of 8 bytes is written to (TBLPTR<2:0> are ignored). For more detail, see Section 8.5 “Writing to Flash Program Memory” . When an erase of program memory is executed, the 16 MSbs of the Table Pointer (TBLPTR<21:6>) point to the 64-byte block that will be erased. The Least Significant bits (TBLPTR<5:0>) are ignored. Figure 8-3 describes the relevant boundaries of TBLPTR based on Flash program memory operations. TABLE 8-1: TABLE POINTER OPERATIONS WITH TBLRD AND TBLWT INSTRUCTIONS FIGURE 8-3: TABLE POINTER BOUNDARIES BASED ON OPERATION Example Operation on Table Pointer TBLRD* TBLWT* TBLPTR is not modified TBLRD*+ TBLWT*+ TBLPTR is incremented after the read/write TBLRD*- TBLWT*- TBLPTR is decremented after the read/write TBLRD+* TBLWT+* TBLPTR is incremented before the read/write 21 16 15 87 0 TABLE ERASE/WRITE TABLE WRITE TABLE READ – TBLPTR<21:0> TBLPTRL TBLPTRH TBLPTRU TBLPTR<5:0> TBLPTR<21:6> |
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