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SM320DM6446 Datasheet(PDF) 70 Page - Texas Instruments

Part # SM320DM6446
Description  Digital Media System-on-Chip
PDF  228 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

SM320DM6446 Datasheet(HTML) 70 Page - Texas Instruments

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3.5.3
Peripheral Selection After Device Reset
SM320DM6446
Digital Media System-on-Chip
SPRS607A – JUNE 2009 – REVISED JUNE 2009
www.ti.com
Table 3-13. DM6446 Multiplexed Peripheral Pins and Multiplexing Controls (continued)
PRIMARY
SECONDARY
TERTIARY
MULTIPLEXED
SECONDARY(1)
TERTIARY(2)
(DEFAULT)
REGISTER/PIN(3)
REGISTER/PIN(3)
PERIPHERALS
FUNCTION
FUNCTION
FUNCTION
CONTROL
CONTROL
ASP, GPIO
GPIO:
ASP:
PinMux1:ASP
GPIO[29:34]
(all pins)(4)
UART0, GPIO
GPIO:
UART0:
PinMux1:UART0
GPIO[35:36]
RXD, TXD
SPI, GPIO
GPIO:
SPI:
PinMux1:SPI
GPIO[37, 39:41]
SPI_EN0,
SPI_CLK,
SPI_DI, SPI_DO
SPI, ATA, GPIO
GPIO:GPIO[42]
SPI: SPI_EN1
ATA: HDDIR
PinMux1:SPI
PinMux0:HDIREN
I2C, GPIO
GPIO:
I2C: SCL, SDA
PinMux1:I2C
GPIO[43:44]
PWM0, GPIO
GPIO:GPIO[45]
PWM0
PinMux1:PWM0
PWM1, VPBE
GPIO:GPIO[46]
VPBE:
PWM1:
PinMux0:RGB666/
PinMux1:PWM1
(RGB666/RGB888),
RGB666/RGB888 PWM1
PinMux0:RGB888
GPIO
R2
PWM2, VPBE
GPIO:GPIO[47]
VPBE:
PWM2:
PinMux0:RGB666/
PinMux1:PWM2
(RGB666/RGB888),
RGB666/RGB888 PWM2
PinMux0:RGB888
GPIO
B2
ClockOut0, GPIO
GPIO:GPIO[48]
CLK_OUT0
PinMux1:CLK0
ClockOut1, TIMER0, GPIO:GPIO[49]
CLK_OUT1
TIMER0:
PinMux1:CLK1
PinMux1:TIM_IN
GPIO
TIM_IN
ATA, GPIO
GPIO:
ATA:
PinMux0:ATAEN
GPIO[50:51]
ATA_CS0,
ATA_CS1
EMIFA, GPIO, ATA
GPIO:GPIO[52]
EMIFA:
ATA (CF):
PinMux0:AEAW[4:0],
PinMux0:ATAEN
(CF)
EM_BA[1]
DA1
Pins:DAEAW[4:0]
EMIFA, HPI, ATA
GPIO:GPIO[53]
EMIFA:
ATA (CF): DA2/
PinMux0:AEAW[4:0],
PinMux0:ATAEN,
(CF), GPIO
EM_A[0]
HPI: HCNTL1
Pins:DAEAW[4:0]
PinMux0:HPIEN,
Pins:BTSEL[1:0] = 10
EMAC, GPIO3V
GPIO:
EMAC:
PinMux0:EMACEN
GPIO3V[0:13]
(all pins, except
CRS)(4)
EMAC, MDIO,
GPIO:
EMAC:
PinMux0:EMACEN
GPIO3V
GPIO3V[14:16]
CRS,
MDIO:
MDIO, MDCLK
UART1, ATA (CF)
N/A
ATA (CF):
UART1: TXD, RXD
PinMux0:ATAEN
PinMux1:UART1
DMACK, DMARQ
UART2, VPFE
VPFE:
UART2:
PinMux1:UART2
CI[7:6]/
UART_RXD2,
CCD_DATA[15:14] UART_TXD2
UART2, VPFE
VPFE:
UART2:
PinMux1:UART2,
CI[5:4]/
UART_CTS2,
PinMux1:U2FLO
CCD_DATA[13:12] UART_RTS2
(4)
See the Terminal Functions section for pin details.
After device reset, the PINMUX0 and PINMUX1 registers are software programmable to allow multiplexing
of shared device pins between peripherals, as given in the Terminal Functions section. Section 3.5.4,
Section 3.5.5, and Section 3.5.6 identify the register settings necessary to configure specific multiplexed
functions and show the primary (default) function after reset.
Device Configurations
70
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