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SM320DM6446 Datasheet(PDF) 77 Page - Texas Instruments |
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SM320DM6446 Datasheet(HTML) 77 Page - Texas Instruments |
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77 / 228 page  3.5.6.8 PWM, RGB888, and GPIO Pin Multiplexing 3.5.6.9 UART, VPFE, ATA, and GPIO Pin Multiplexing SM320DM6446 Digital Media System-on-Chip www.ti.com SPRS607A – JUNE 2009 – REVISED JUNE 2009 Table 3-27. SPI and GPIO Pin Multiplexing PINMUX0 AND PINMUX1 REGISTER BIT FIELDS MULTIPLEXED PINS SP_EN1/ SPI_DO/ SPI_DI/ SPI_CLK/ SPI_EN0/ SPI ATAEN HDIREN HDDIR/ GPIO[41] GPIO[40] GPIO[39] GPIO[37] GPIO[42] 0 0 0 GPIO[42] GPIO[41] GPIO[40] GPIO[39] GPIO[37] 0 0 1 Driven Low GPIO[41] GPIO[40] GPIO[39] GPIO[37] 0 1 0 GPIO[42] GPIO[41] GPIO[40] GPIO[39] GPIO[37] 0 1 1 HDDIR GPIO[41] GPIO[40] GPIO[39] GPIO[37] 1 0 0 SP_EN1 SPI_DO SPI_DI SPI_CLK SPI_EN0 1 0 1 Driven Low SPI_DO SPI_DI SPI_CLK SPI_EN0 1 1 0 SP_EN1 SPI_DO SPI_DI SPI_CLK SPI_EN0 1 1 1 HDDIR SPI_DO SPI_DI SPI_CLK SPI_EN0 Table 3-28. I2C and GPIO Pin Multiplexing PINMUX1 REGISTER MULTIPLEXED PINS BIT FIELD I2C_CLK/ I2C_DATA/ I2C GPIO[43] GPIO[44] 0 GPIO[43] GPIO[44] 1 I2C_CLK I2C_DATA Table 3-29 shows the PWM0/1/2 pin multiplexing. Each PWM output is independently controlled by its own enable bit. The PWM function has priority over RGB888 muxing (see Section 3.5.6.3). Table 3-29. PWM0/1/2, RGB888, and GPIO Pin Multiplexing PINMUX1 REGISTER BIT FIELDS MULTIPLEXED PINS PWM2/ PWM1/ PWM0/ PWM2 PWM1 PWM0 RGB888 B2/ R2/ GPIO[45] GPIO[47] GPIO[46] 0 0 0 0 GPIO[47] GPIO[46] GPIO[45] 0 0 0 1 B2 R2 GPIO[45] - - 1 - - - PWM0 - 1 - - - PWM1 - 1 - - - PWM2 - - Each UART has independent pin multiplexing control bits in the PINMUX1 register. The UART2 peripheral may be used with or without the flow control signals. Table 3-30 shows how UART2 selection reduces the width of the VPFE interface. Setting the UART1 bit enables UART1 transmit and receive pin functionality. Since these are shared with the ATA DMA handshake signals, enabling UART1 effectively disables the ATA DMA mode. However, ATA PIO mode is still supported with UART1 enabled. This is shown in Table 3-31. If the ATA module is not enabled, the pins are always configured for use by UART1. Submit Documentation Feedback Device Configurations 77 |
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