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OR2C04A Datasheet(PDF) 93 Page - List of Unclassifed Manufacturers |
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OR2C04A Datasheet(HTML) 93 Page - List of Unclassifed Manufacturers |
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93 / 192 page  Data Sheet June 1999 ORCA Series 2 FPGAs Lucent Technologies Inc. 93 P3 PL10D PL11D PL12D PL13D PL14D I/O-A12 R2 PL10C PL11C PL12C PL13B PL14B I/O T1 PL10B PL11B PL12B PL14D PL15D I/O P4 PL10A PL11A PL13D PL14B PL15B I/O-A13 R3 PL11D PL12D PL13B PL14A PL15A I/O T2 PL11C PL12C PL13A PL15D PL16D I/O U1 PL11B PL12B PL14D PL15B PL16B I/O T3 PL11A PL12A PL14C PL16D PL17D I/O-A14 U2 — PL13D PL15D PL17D PL18D I/O-VDD5 V1 PL12D PL13C PL15C PL17C PL18C I/O T4 PL12C PL13B PL15B PL17B PL18A I/O U3 PL12B PL13A PL15A PL17A PL19D I/O V2 — PL14D PL16D PL18D PL19C I/O W1 — PL14C PL16C PL18C PL19A I/O V3 — PL14B PL16B PL18B PL20D I/O W2 PL12A PL14A PL16A PL18A PL20A I/O-A15 Y1 CCLK CCLK CCLK CCLK CCLK CCLK Y2 PB1A PB1A PB1A PB1A PB1A I/O-A16 W4 — PB1C PB1C PB1C PB1D I/O V4 PB1B PB1D PB1D PB1D PB2A I/O U5 PB1C PB2A PB2A PB2A PB2D I/O-VDD5 Y3 PB1D PB2B PB2B PB2B PB3A I/O Y4 — PB2C PB2C PB2C PB3C I/O V5 — PB2D PB2D PB2D PB3D I/O W5 PB2A PB3A PB3B PB3D PB4D I/O-A17 Y5 PB2B PB3B PB4B PB4D PB5D I/O V6 PB2C PB3C PB4C PB5A PB6A I/O U7 PB2D PB3D PB4D PB5B PB6B I/O W6 PB3A PB4A PB5A PB5D PB6D I/O Y6 PB3B PB4B PB5B PB6A PB7A I/O V7 PB3C PB4C PB5C PB6B PB7B I/O W7 PB3D PB4D PB5D PB6D PB7D I/O Y7 PB4A PB5A PB6A PB7A PB8A I/O V8 PB4B PB5B PB6B PB7B PB8B I/O W8 PB4C PB5C PB6C PB7C PB8C I/O Y8 PB4D PB5D PB6D PB7D PB8D I/O U9 PB5A PB6A PB7A PB8A PB9A I/O V9 PB5B PB6B PB7B PB8B PB9B I/O W9 PB5C PB6C PB7C PB8C PB9C I/O Y9 PB5D PB6D PB7D PB8D PB9D I/O Pin Information (continued) Table 25. OR2C/2T06A, OR2C/2T08A, OR2C/2T10A, OR2C/2T12A, and OR2C/2T15A/B 256-Pin PBGA Pinout (continued) Pin 2C/2T06A Pad 2C/2T08A Pad 2C/2T10A Pad 2C/2T12A Pad 2C/2T15A/B Pad Function Notes: The W3 pin on the 256-pin PBGA package is unconnected for all devices listed in this table. The OR2C/2T08A do not have bond pads connected to the 256-pin PBGA package pins F2 and Y17. The pins labeled I/O-VDD5 are user I/Os for the OR2CxxA and OR2TxxB series, but they are connected to VDD5 for the OR2TxxA series. The pins labeled VSS-ETC are the 4 x 4 array of thermal balls located at the center of the package. The balls can be attached to the ground plane of the board for enhanced thermal capability (see Table 29), or they can be left unconnected. |
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