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OR2C04A Datasheet(PDF) 106 Page - List of Unclassifed Manufacturers

Part # OR2C04A
Description  Field-Programmable Gate Arrays
PDF  192 Pages
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OR2C04A Datasheet(HTML) 106 Page - List of Unclassifed Manufacturers

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Data Sheet
ORCA Series 2 FPGAs
June 1999
106
Lucent Technologies Inc.
Pin Information (continued)
Table 27. OR2C/2T10A, OR2C/2T12A, OR2C/2T15A/B, OR2C/2T26A, and OR2T40A/B 352-Pin PBGA
Pinout
Pin
2C/2T10A Pad
2C/2T12A Pad
2C/2T15A/B Pad
2C/2T26A Pad OR2T40A/B Pad
Function
B1
PL1D
PL1D
PL1D
PL1D
PL1D
I/O
C2
PL1C
PL1C
PL1C
PL1C
PL1A
I/O
C1
PL1B
PL1B
PL1B
PL1B
PL2D
I/O
D2
PL1A
PL1A
PL1A
PL1A
PL2A
I/O
D3
PL2D
PL2D
PL2D
PL2D
PL3D
I/O-A0
D1
PL2C
PL2C
PL2A
PL2A
PL3A
I/O
E2
PL2B
PL2B
PL3D
PL3D
PL4D
I/O
E4
—
—
PL3B
PL3B
PL4B
I/O
E3
PL2A
PL2A
PL3A
PL3A
PL4A
I/O
E1
PL3D
PL3D
PL4D
PL4D
VDD5
I/O-VDD5
F2
—
PL3C
PL4C
PL4C
PL5C
I/O
G4
PL3C
PL3B
PL4B
PL4B
PL5B
I/O
F3
—
PL3A
PL4A
PL4A
PL6D
I/O
F1
PL3B
PL4D
PL5D
PL5D
PL7D
I/O
G2
—
PL4C
PL5C
PL5C
PL7C
I/O
G1
—
PL4B
PL5B
PL5B
PL7B
I/O
G3
PL3A
PL4A
PL5A
PL5A
PL8D
I/O-A1
H2
PL4D
PL5D
PL6D
PL6D
PL9D
I/O
J4
PL4C
PL5C
PL6C
PL6C
PL9C
I/O
H1
PL4B
PL5B
PL6B
PL6B
PL9B
I/O
H3
PL4A
PL5A
PL6A
PL6A
PL9A
I/O-A2
J2
PL5D
PL6D
PL7D
PL7D
PL10D
I/O
J1
PL5C
PL6C
PL7C
PL7C
PL10C
I/O
K2
PL5B
PL6B
PL7B
PL7B
PL10B
I/O
J3
PL5A
PL6A
PL7A
PL7A
PL10A
I/O-A3
K1
PL6D
PL7D
PL8D
PL8D
PL11D
I/O
K4
PL6C
PL7C
PL8C
PL8A
PL11A
I/O
L2
PL6B
PL7B
PL8B
PL9D
PL12D
I/O
K3
PL6A
PL7A
PL8A
PL9A
PL12A
I/O-A4
L1
PL7D
PL8D
PL9D
PL10D
PL13D
I/O-A5
M2
PL7C
PL8C
PL9C
PL10A
PL13A
I/O
M1
PL7B
PL8B
PL9B
PL11D
PL14D
I/O
L3
PL7A
PL8A
PL9A
PL11A
PL14A
I/O-A6
N2
PL8D
PL9D
PL10D
PL12D
PL15D
I/O
M4
PL8C
PL9C
PL10C
PL12C
PL15C
I/O
N1
PL8B
PL9B
PL10B
PL12B
PL15B
I/O
M3
PL8A
PL9A
PL10A
PL12A
PL15A
I/O-A7
P2
PL9D
PL10D
PL11D
PL13D
PL16D
I/O
Notes:
The pins labeled I/O-VDD5 are user I/Os for the OR2CxxA and OR2TxxB series, but they are connected to VDD5 for the OR2TxxA series.
The pins labeled VSS-ETC are the 6 x 6 array of thermal balls located at the center of the package. The balls can be attached to the ground plane
of the board for enhanced thermal capability (see Table 29), or they can be left unconnected.



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