HT85F2270 datasheet(12/226 Pages) HOLTEK

12 / 226 page

Rev. 1.00

1� of ��6

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Standard 8051 8-Bit Flash MCU

HT85F2260/HT85F2270/HT85F2280

List of Figures

Stack Block Diagram ............................................................................................................................... �9

Program �emor� Structure ..................................................................................................................... �1

Unlock Procedure Flowchart.................................................................................................................... �7

Page Erase Flowchart ............................................................................................................................. �8

B�te Read Flowchart ............................................................................................................................... �9

B�te Write Flowchart (F�CR.0=1� F�CR.6=0) ....................................................................................... 40

B�te Write Flowchart (F�CR.0=1� F�CR.6=1) ....................................................................................... 41

Internal Data �emor� Structure............................................................................................................... 47

HT8�F��70/HT8�F��80 XDATA.............................................................................................................. 48

HT8�F��60 XDATA.................................................................................................................................. 49

DPTRn Registers Control Block Diagram................................................................................................ ��

Cr�stal/Resonator Oscillator – HXT......................................................................................................... �8

External LXT Oscillator – LXT.................................................................................................................. �9

System Clock Configurations................................................................................................................... 61

PLL Frequenc� Changing ........................................................................................................................ 64

Watchdog Timer....................................................................................................................................... 69

Watchdog Timer Refresh Operation ........................................................................................................ 74

Power-On Reset Timing .......................................................................................................................... 78

Interrupt Structure.................................................................................................................................. 10�

Interrupt Flowchart................................................................................................................................. 106

Time Base Clock Source Select .............................................................................................................114

Quasi-bidirectional I/O Structure............................................................................................................ 1�4

Push-pull Output Structure .................................................................................................................... 1��

Open-drain Output Structure ................................................................................................................. 1��

Input Onl� Structure............................................................................................................................... 1��

�ode 0 and �ode 1 Block Diagram – Timer 0� 1� � .............................................................................. 1�6

�ode � Block Diagram – Timer 0� 1� � .................................................................................................. 1�7

�ode � Block Diagram – Timer 0 .......................................................................................................... 1�8

Timer � with PCA �odules Block Diagram ............................................................................................ 140

Capture �odes Block Diagram.............................................................................................................. 146

Compare �ode 0 – �odule 1� �odule �� odule �............................................................................... 147

Compare �ode 0 – �odule 0 ................................................................................................................ 148

Compare �ode 0 Timing Diagram......................................................................................................... 148

Compare �ode 1 – �odule1� �odule�� odule �................................................................................. 149

Compare �ode 1 – �odule 0 ................................................................................................................ 149

Compare �ode 1 Timing Diagram......................................................................................................... 1�0

Reload �ode – �odule 0....................................................................................................................... 1�1

Timer� Clock Output Block Diagram...................................................................................................... 1��

Programmable Clock Output Timing Diagram – �odule 0 .................................................................... 1��

A/D Converter Structure ........................................................................................................................ 1��

A/D Conversion Timing .......................................................................................................................... 16�

Ideal A/D Transfer Function (PGA=1) .................................................................................................... 16�

DAC Basic Operational Block Diagram ................................................................................................. 166

HT85F2270 Datasheet(PDF) 12 Page - Holtek Semiconductor Inc

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