IMX53IEC datasheet(29/173 Pages) FREESCALE

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Electrical Characteristics

i.MX53 Applications Processors for Industrial Products, Rev. 6

Freescale Semiconductor

4.3.2.2

LPDDR2 Mode I/O DC Parameters

The LPDDR2 interface fully complies with JESD209-2B LPDDR2 JEDEC standard release June, 2009.

The parameters in Table 12 are guaranteed per the operating ranges in Table 6, unless otherwise noted.

4.3.2.3

DDR3 Mode I/O DC Parameters

The DDR3 interface fully complies with JESD79-3D DDR3 JEDEC standard release April, 2008. The

parameters in Table 13 are guaranteed per the operating ranges in Table 6, unless otherwise noted.

4 Vid(dc) specifies the input differential voltage |Vtr-Vcp| required for switching, where Vtr is the “true” input level and Vcp is the

“complementary” input level. The minimum value is equal to Vih(dc) -Vil(dc).

5 Use an off-chip pull resistor of less than 60 kΩ to override this keeper.

Table 12. LPDDR2 I/O DC Electrical Parameters1

1 Note that the JEDEC LPDDR2 specification (JESD209_2B) supersedes any specification in this document.

Parameters

Symbol

Test Conditions

Min

Typ

Max

Unit

High-level output voltage

Voh

Ioh = -0.1 mA

0.9 x OVDD

—

Low-level output voltage

Vol

Iol = 0.1 mA

—

0.1 x OVDD

Input Reference Voltage

Vref

0.49 x OVDD 0.5 x OVDD

0.51 x OVDD

DC input High Voltage

Vih(dc)

—

Vref+0.13V

—

OVDD

DC input Low Voltage

Vil(dc)

—

OVSS

—

Vref - 0.13V

Differential Input Logic High

Vih(diff)

0.26

See Note2

2 The single-ended signals need to be within the respective limits (Vih(dc) max, Vil(dc) min) for single-ended signals as well as

the limitations for overshoot and undershoot.

Differential Input Logic Low

Vil(diff)

See Note2

-0.26

Input current (no pull-up/down)

Iin

Vin = 0 V

Vin = OVDD

—

μA

Pull-up/Pull-down impedance Mismatch

-15

+15

240

Ω unit calibration resolution

Keeper Circuit Resistance

—

1403

3 Use an off-chip pull resistor of less than 60 kΩ to override this keeper.

—k

Table 13. DDR3 I/O DC Electrical Parameters

Parameters

Symbol

Test Conditions

Min

Typ

Max

Unit

High-level output voltage

Voh

Ioh = -0.1 mA

0.8 x OVDD1

——

Low-level output voltage

Vol

Iol = 0.1 mA

—

0.2 x OVDD

DC input Logic High

VIH(dc)

—

Vref2+0.1

—

OVDD

DC input Logic Low

VIL(dc)

—

OVSS

—

Vref-0.1

Differential input Logic High

VIH(diff)

—

0.2

—

See Note3

Differential input Logic Low

VIL(diff)

—

See Note3

—-0.2

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