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IO96NDB2V1 Datasheet(PDF) 239 Page - Microsemi Corporation

Part # IO96NDB2V1
Description  ProASIC3L Low Power Flash FPGAs with Flash*Freeze Technology
PDF  242 Pages
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Manufacturer  MICROSEMI [Microsemi Corporation]
Direct Link  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

IO96NDB2V1 Datasheet(HTML) 239 Page - Microsemi Corporation

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ProASIC3L Low Power Flash FPGAs
Revision 13
5-7
Revision 4 (cont’d)
The last section of Table 2-18 • Different Components Contributing to Dynamic
Power Consumption in ProASIC3L Devices at 1.2 V VCC was made into a new
table: Table 2-19 • Different Components Contributing to Dynamic Power
Consumption in ProASIC3L Devices at 1.5 V VCC. The table numbers
referenced for device-specific dynamic power for PAC9 and PAC10 were changed
in Table 2-18 • Different Components Contributing to Dynamic Power
Consumption in ProASIC3L Devices at 1.2 V VCC. The definition of PDC5 was
updated and parameters PDC6 and PDC7 were added to Table 2-20 • Different
Components Contributing to the Static Power Consumption in ProASIC3L
Devices.
2-13
The "Total Static Power Consumption—PSTAT" section was updated to revise the
calculation of PSTAT, including PDC6 and PDC7.
2-15
Footnote 1 was updated to include information about PAC13.
2-16
Table 2-43 • Schmitt Trigger Input Hysteresis, Hysteresis Voltage Value (Typ) for
Schmitt Mode Input Buffers was updated to include the hysteresis value for 1.2 V
LVCMOS.
2-40
The "1.2 V LVCMOS (JESD8-12A)" section is new.
2-76
Revision 3 (Apri2008)
Product Brief v1.0
The product brief was divided into two sections and given a version number,
starting at v1.0. The first section of the document includes features, benefits,
ordering information, and temperature and speed grade offerings. The second
section is a device family overview.
N/A
Packaging v1.1
The "FG324" package diagram was replaced.
4-29
Revision 2 (Apr 2008)
Product Brief rev. 1
Reference to M1A3P250L was removed from Table 1 • ProASIC3 Low-Power
Product Family, the "I/Os Per Package 1" table, the "ProASIC3L Ordering
Information" section, and the "Temperature Grade Offerings" table. The table note
regarding M1A3P250L was removed from the "I/Os Per Package 1" table.
I, II, III, IV
Revision 1 (Feb 2008)
The "PLL Behavior at Brownout Condition" section is new.
2-4
DC and Switching
Characteristics
Advance v0.2
Table 2-204 • A3P250L Global Resource – Applies to 1.5 V DC Core Voltage,
Table 2-206 • A3P600L Global Resource – Applies to 1.5 V DC Core Voltage,
Table 2-208 • A3P1000L Global Resource – Applies to 1.5 V DC Core Voltage,
and Table 2-210 • A3PE3000L Global Resource – Applies to 1.5 V DC Core
Voltage were updated with values for tRCKL, tRCKH, and tRCKSW.
2-128 –
2-131
The worst-case commercial conditions were added to Table 2-221 • Embedded
FlashROM Access Time– Applies to 1.2 V DC Core Voltage.
2-148
Table 2-18 • Different Components Contributing to Dynamic Power Consumption
in ProASIC3L Devices at 1.2 V VCC was updated to revise the value for PAC14
and add parameters PDC1 through PDC5 to the table.
2-13
Revision
Changes
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