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AN2783 Datasheet(PDF) 27 Page - STMicroelectronics

Part # AN2783
Description  PM8800 demonstration kit for standard and high power PoE
PDF  47 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN2783 Datasheet(HTML) 27 Page - STMicroelectronics

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AN2783
Layout guidelines
27/47
11
Layout guidelines
We suggest the following guidelines for the layout of the PM8800:
●
Place the component group including input ceramic capacitors, input side of
transformer, power MOSFET and sense resistors close to each other in order to keep
the interconnections as short as possible.
●
Place the component group including secondary rectifier diode, output side of
transformer, output ceramic capacitors close to each other in order to keep the
interconnections as short as possible.
●
Place the PM8800 in such a way as to have a short path to the gate of the power
MOSFET. Use a 20-30 mils wide path for this signal.
●
Ground: there are basically 4 different grounds on the board (VSS, GND, RTN and
chassis ground).
–
The exposed pad of PM8800 must be connected to VSS. Design a fill area with at
least 6 vias to the VSS plane. Try where possible to increase the number of VSS
power planes connected, at least below the PM8800 position, to improve the heat
dissipation of PM8800.
–
GND must be divided into power gnd (to connect input caps, Rsense, PM8800 pin
9, AUXII circuitry, isolation cap) and signal gnd (to connect the other components
around the PM8800, the circuitry powered by VCC voltage, and the IC pin 16). The
signal gnd must be connected to power gnd in one point only, close to the PM8800
pin 9. Keep the power path on RTN (output side of transformer, secondary diode,
output connector) separated from the feedback network gnd, which is connected
only at the connector side.
●
Design the power MOSFET area with at least 9-12 vias of connection to the internal
copper area. Try where possible to increase the number of power planes connected, at
least below the MOSFET position, to improve the heat dissipation.
●
Design the secondary rectifier diode with at least 9-12 vias of connection to the internal
copper area.
●
Try where possible to increase the number of power planes connected, at least below
the diode position, to improve the heat dissipation.
●
Chassis: design copper areas on both side of the PCB. Do not place other grounds or
signals under the RJ45 and the data transformer area. Place any termination network
on the bottom side.



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