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AN2785 Datasheet(PDF) 6 Page - STMicroelectronics |
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AN2785 Datasheet(HTML) 6 Page - STMicroelectronics |
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6 / 51 page ![]() Logic inputs AN2785 6/51 Doc ID 14785 Rev 1 2 Logic inputs In the L6393 IC the two input signals (PHASE and BRAKE) are fed into an AND logic port and the resulting signal is in phase with the high-side output HVG and in opposition of phase with the low-side output LVG. This means that if BRAKE is held high, the PHASE signal drives the half bridge in phase with the HVG output and in opposition of phase with the LVG output. If BRAKE is set to low, the low-side output LVG is always ON and the high-side output HVG is always OFF, regardless of the PHASE signal. This kind of logic interface provides the possibility of controlling the power stages using the PHASE signal to select the current direction in the bridge and the BRAKE signal to perform current slow decay on the low sides or even a brake function on the low-side power transistors in case of multi-phase power bridges (for example, full or 3-phase bridges). From the point of view of logic operations, the two signals PHASE and BRAKE are completely equivalent, meaning that the two signals can be exchanged without changing the behavior on the resulting output signals (see the block diagram in Figure 1 on page 1). Note: The dead time between the turn OFF of one power switch and the turn ON of the other power switch is defined by the resistor connected between the DT pin and ground. Figure 2. Input configurations All the logic inputs are provided with hysteresis (~1 V) for low noise sensitivity and are TTL//CMOS 3.3 V-compatible. Thanks to this low voltage interface logic compatibility, the L6393 can be used with any kind of high performance controller, such as microcontrollers, DSPs or FPGAs. As shown in the block diagram of Figure 1 the logic inputs have internal pull-down resistors. The purpose of these resistors is to set a proper logic level in case, for example, there is an interruption of the logic lines or the controller outputs are in tri-state conditions: if logic inputs are left floating, the gate driver outputs LVG and HVG are set high and low respectively. The internal resistors are: ● PHASE logic input: 375 k Ω (typ.) pull-down. ● BRAKE logic input: 375 k Ω (typ.) pull-down. ● SD logic input: 500 k Ω (typ.) pull-down. PHASE BRAKE SD HVG LVG DEAD TIME LEVEL SHIFTER |
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