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MSP430F5259IRGCT Datasheet(PDF) 34 Page - Texas Instruments |
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MSP430F5259IRGCT Datasheet(HTML) 34 Page - Texas Instruments |
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34 / 112 page ![]() MSP430F5259, MSP430F5258, MSP430F5257, MSP430F5256 MSP430F5255, MSP430F5254, MSP430F5253, MSP430F5252 SLAS903B – MAY 2013 – REVISED NOVEMBER 2015 www.ti.com 5.33 Timer_A over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS VCC VIO MIN MAX UNIT Internal: SMCLK, ACLK 1.8 V 1.62 V to 1.8 V 25 fTA Timer_A input clock frequency External: TACLK MHz 3.0 V 1.62 V to 1.98 V 25 Duty cycle = 50% ±10% All capture inputs, 1.8 V 1.62 V to 1.8 V 20 tTA,cap Timer_A capture timing(1) Minimum pulse duration ns 3.0 V 1.62 V to 1.98 V 20 required for capture (1) The external signal sets the interrupt flag every time the minimum parameters are met. It may be set even with trigger signals shorter than tTA,cap. 5.34 Timer_B over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS VCC VIO MIN MAX UNIT Internal: SMCLK, ACLK 1.8 V 1.62 V to 1.8 V 25 fTB Timer_B input clock frequency External: TBCLK MHz 3.0 V 1.62 V to 1.98 V 25 Duty cycle = 50% ±10% All capture inputs, 1.8 V 1.62 V to 1.8 V 20 tTB,cap Timer_B capture timing(1) Minimum pulse duration ns 3.0 V 1.62 V to 1.98 V 20 required for capture (1) The external signal sets the interrupt flag every time the minimum parameters are met. It may be set even with trigger signals shorter than tTB,cap. 34 Specifications Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: MSP430F5259 MSP430F5258 MSP430F5257 MSP430F5256 MSP430F5255 MSP430F5254 MSP430F5253 MSP430F5252 |
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