MB9B360R datasheet(84/166 Pages) CYPRESS

Part #	MB9B360R

Description	32-Bit ARM짰 Cortex짰 - M4F FM4 Microcontroller

PDF	166 Pages

Scroll/Zoom	100%

Manufacturer	CYPRESS [Cypress Semiconductor]

Direct Link	http://www.cypress.com

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84 / 166 page

Document Number: 002-04872 Rev.*A

Page 84 of 166

MB9B360R Series

12.4.9

GPIO Output Characteristics

(VCC = 2.7V to 5.5V, VSS = 0V)

Parameter

Symbol

Pin name

Conditions

Value

Unit

Min

Max

Output frequency

tPCYCLE

Pxx*

VCC ≥ 4.5 V

MHz

VCC < 4.5 V

MHz

*: GPIO is a target.

Pxx

tPCYCLE

12.4.10 External Bus Timing

External bus clock output characteristics

(VCC = 2.7V to 5.5V, VSS = 0V)

Parameter

Symbol

Pin name

Conditions

Value

Unit

Min

Max

Output frequency

tCYCLE

MCLKOUT*

VCC ≥ 4.5 V

50*

MHz

VCC < 4.5 V

32*

MHz

*1: The external bus clock (MCLKOUT) is a divided clock of HCLK.

For more information about

setting of clock divider, see “Chapter: External Bus Interface” in “FM4 Family Peripheral Manual”.

*2: Generate MCLKOUT at setting more than 4 division when the AHB bus clock exceeds 100MHz.

*3: Generate MCLKOUT at setting more than 4 division when the AHB bus clock exceeds 64MHz.

0.8 × Vcc

tCYCLE

MCLK

MB9B360R Datasheet(PDF) 84 Page - Cypress Semiconductor

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