ML7204-003 datasheet(53/214 Pages) LAPIS

53 / 214 page

FEDL7204-003-02

ML7204-003

53/214

When receive data of the same channel is written in one frame or the receive data channel notification is

invalid, an interrupt is generated by setting a receive side invalid write error flag (RXBW_ERR) to “1”.

RXBW_ERR is retained from the next valid write period until immediately before the termination of the frame

for which invalid receive data has no longer been written.

 Terminating 2-channel operation

When returning a 2-channel operation mode to a single-channel operation mode, it is possible to notify which

channel’s transmit/receive data is continuously encoded or decoded by setting an option in ACTCH_FLAG.

To continue encoding/decoding of transmit/receive data of channel 1, set ACTCH_FLAG to “0” and then set

SC_EN = 1 and DC_EN = 0. Encoding/decoding of channel 2 transmit/receive data stops within a maximum of

250

s; however, encoding/decoding of channel 1 transmit/receive data continues.

To continue encoding/decoding of channel 2 transmit/receive data, set ACTCH_FLAG to “1” and then set

SC_EN = 1 and DC_EN = 0. Encoding/decoding of channel 1 transmit/receive data stops within a maximum

of 250

s; however, encoding/decoding of channel 2 transmit/receive data continues. Figure 32 shows an

example where exchange of channel 1 transmit/receive data is continued.

(Note)

1. In the frame where SC_EN = 1 and DC_EN = 0 are set, CH1/CH2 transmit data read requests and receive data

write requests are issued normally. However, even if transmit data or receive data of the channel that was

terminated is not read or written, an error does not occur.

2. After RXREQ_DC is cleared to “0”, write processing to RXFLAG_[CH2:CH1] is not necessary.

3. To set DC_EN = 1 again after setting DC_EN = 0, a wait period of approx. 10 ms or more is required after

TXREQ_DC = 0 and RXREQ_DC = 0 are set.

 Performing single-channel operation

 Transmit

Operates according to the contents described in  Operation and  Error processing in Figure 16.

Note that FR0_CH1 is set to “1” when a transmit data read request is issued in this operation state or the CH1

transmit error flag (TXERR_CH1) is set to “1” at the occurrence of an error also in this operation state, even if

continuation of encoding/decoding of channel 2 transmit/receive data is set in  Terminating 2-channel

operation.

 Receive

Operates according to the contents described in  Operation and  Error processing in Figure 20. The G.711

PLC function enable control register (G711_PLCEN) is set to “0”.

Note that the CH1 receive error flag (RXERR_CH1) is set to “1” at the occurrence of an error in this operation

state even if continuation of encoding/decoding of the channel 2 transmit/receive data is set in  Terminating

2-channel operation.

ML7204-003 Datasheet(PDF) 53 Page - LAPIS Semiconductor Co., Ltd.