LAN9115 datasheet(101/114 Pages) MICROCHIP

Part #	LAN9115

Description	Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller

PDF	114 Pages

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Manufacturer	MICROCHIP [Microchip Technology]

Direct Link	http://www.microchip.com

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101 / 114 page

 2005-2016 Microchip Technology Inc.

DS00002269A-page 101

LAN9115

6.6

PIO Writes

PIO writes are used for all LAN9115 write cycles. PIO writes can be performed using Chip Select (nCS) or Write Enable

(nWR). Either or both of these control signals must go high between cycles for the period specified.

FIGURE 6-6:

PIO WRITE CYCLE TIMING

Note:

The “Data Bus” width is 16 bits.

TABLE 6-6:

PIO WRITE CYCLE TIMING

Symbol

Description

MIN

TYP

MAX

Units

tcycle

Write Cycle Time

165

tcsl

nCS, nWR Assertion Time

tcsh

nCS, nWR Deassertion Time

tasu

Address Setup to nCS, nWR Assertion

tah

Address Hold Time

tdsu

Data Setup to nCS, nWR Deassertion

tdh

Data Hold Time

Note:

A PIO Write cycle begins when both nCS and nWR are asserted. The cycle ends when either or both nCS

and nWR are deasserted. They may be asserted and deasserted in any order.

Data Bus

nCS, nWR

A[7:1]

LAN9115 Datasheet(PDF) 101 Page - Microchip Technology