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CS5530A Datasheet(PDF) 143 Page - National Semiconductor (TI) |
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CS5530A Datasheet(HTML) 143 Page - National Semiconductor (TI) |
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143 / 259 page  Revision 1.1 143 www.national.com Register Descriptions (Continued) 90h 8 R/W GPIO Pin Direction Register 1 00h Page 170 91h 8 R/W GPIO Pin Data Register 1 00h Page 170 92h 8 R/W GPIO Control Register 1 00h Page 170 93h 8 R/W Miscellaneous Device Control Register 00h Page 171 94h 8 R/W Suspend Modulation OFF Count Register 00h Page 171 95h 8 R/W Suspend Modulation ON Count Register 00h Page 171 96h 8 R/W Suspend Configuration Register 00h Page 171 97h 8 R/W GPIO Control Register 2 00h Page 172 98h-99h 16 R/W Primary Hard Disk Idle Timer Count Register 0000h Page 172 9Ah-9Bh 16 R/W Floppy Disk Idle Timer Count Register 0000h Page 172 9Ch-9Dh 16 R/W Parallel / Serial Idle Timer Count Register 0000h Page 172 9Eh-9Fh 16 R/W Keyboard / Mouse Idle Timer Count Register 0000h Page 173 A0h-A1h 16 R/W User Defined Device 1 Idle Timer Count Register 0000h Page 173 A2h-A3h 16 R/W User Defined Device 2 Idle Timer Count Register 0000h Page 173 A4h-A5h 16 R/W User Defined Device 3 Idle Timer Count Register 0000h Page 173 A6h-A7h 16 R/W Video Idle Timer Count Register 0000h Page 173 A8h-A9h 16 R/W Video Overflow Count Register 0000h Page 173 AAh-ABh -- -- Reserved xxh Page 173 ACh-ADh 16 R/W Secondary Hard Disk Idle Timer Count Register 0000h Page 174 AEh 8 WO CPU Suspend Command Register 00h Page 174 AFh 8 WO Suspend Notebook Command Register 00h Page 174 B0h-B3h -- -- Reserved xxh Page 174 B4h 8 RO Floppy Port 3F2h Shadow Register xxh Page 174 B5h 8 RO Floppy Port 3F7h Shadow Register xxh Page 174 B6h 8 RO Floppy Port 1F2h Shadow Register xxh Page 174 B7h 8 RO Floppy Port 1F7h Shadow Register xxh Page 174 B8h 8 RO DMA Shadow Register xxh Page 175 B9h 8 RO PIC Shadow Register xxh Page 175 BAh 8 RO PIT Shadow Register xxh Page 175 BBh 8 RO RTC Index Shadow Register xxh Page 175 BCh 8 R/W Clock Stop Control Register 00h Page 176 BDh-BFh -- -- Reserved xxh Page 176 C0h-C3h 32 R/W User Defined Device 1 Base Address Register 00000000h Page 176 C4h-C7h 32 R/W User Defined Device 2 Base Address Register 00000000h Page 176 C8h-CBh 32 R/W User Defined Device 3 Base Address Register 00000000h Page 176 CCh 8 R/W User Defined Device 1 Control Register 00h Page 176 CDh 8 R/W User Defined Device 2 Control Register 00h Page 177 CEh 8 R/W User Defined Device 3 Control Register 00h Page 177 CFh -- -- Reserved xxh Page 177 D0h 8 WO Software SMI Register 00h Page 177 D1h-EBh -- -- Reserved xxh Page 177 ECh 8 R/W Timer Test Register 00h Page 177 EDh-F3h -- -- Reserved xxh Page 177 F4h 8 RC Second Level Power Management Status Register 1 00h Page 178 F5h 8 RC Second Level Power Management Status Register 2 00h Page 179 F6h 8 RC Second Level Power Management Status Register 3 00h Page 180 F7h 8 RO/RC Second Level Power Management Status Register 4 00h Page 181 F8h-FFh -- -- Reserved xxh Page 181 Table 4-2. Function 0: PCI Header and Bridge Configuration Registers Summary (Continued) F0 Index Width (Bits) Type Name Reset Value Reference (Table 4-15) |
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