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MMPF0200 Datasheet(PDF) 103 Page - NXP Semiconductors |
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MMPF0200 Datasheet(HTML) 103 Page - NXP Semiconductors |
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103 / 114 page ![]() NXP Semiconductors 103 PF0200 TYPICAL APPLICATIONS 2. Care must be taken with SWxFB pins traces. These signals are susceptible to noise and must be routed far away from power, clock, or high power signals, like the ones on the SWxIN, SWx, SWxLX, SWBSTIN, SWBST, and SWBSTLX pins. They could be also shielded. 3. Shield feedback traces of the regulators and keep them as short as possible (trace them on the bottom so the ground and power planes shield these traces). 4. Avoid coupling traces between important signal/low noise supplies (like REFCORE, VCORE, VCOREDIG) from any switching node (i.e. SW1ALX, SW1BLX, SW2LX, SW3ALX, SW3BLX, and SWBSTLX). 5. Make sure that all components related to a specific block are referenced to the corresponding ground. 7.2.4 Parallel routing requirements 1. I2C signal routing • CLK is the fastest signal of the system, so it must be given special care. • To avoid contamination of these delicate signals by nearby high power or high frequency signals, it is a good practice to shield them with ground planes placed on adjacent layers. Make sure the ground plane is uniform throughout the whole signal trace length. Figure 25. Recommended shielding for critical signals • These signals can be placed on an outer layer of the board to reduce their capacitance with respect to the ground plane. • Care must be taken with these signals not to contaminate analog signals, as they are high frequency signals. Another good practice is to trace them perpendicularly on different layers, so there is a minimum area of proximity between signals. 7.2.5 Switching regulator layout recommendations 1. Per design, the switching regulators in PF0200 are designed to operate with only one input bulk capacitor. However, it is recommended to add a high-frequency filter input capacitor (CIN_hf), to filter out any noise at the regulator input. This capacitor should be in the range of 100 nF and should be placed right next to or under the IC, closest to the IC pins. 2. Make high-current ripple traces low-inductance (short, high W/L ratio). 3. Make high-current traces wide or copper islands. |
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