LPC47M192 datasheet(20/228 Pages) SMSC

20 / 228 page

SMSC DS – LPC47M192

Page 20

Rev. 03/30/05

DATASHEET

Note 4:

The LPCPD# pin may be tied high. The LPC interface will function properly if the PCI_RESET# signal

follows the protocol defined for the LRESET# signal in the “Low Pin Count Interface Specification”.

Note 5:

These pins are inputs to VCC and VTR powered logic.

Note 6:

The fan control pins (FAN1 and FAN2) come up as outputs and low following a VCC POR and PCI Reset.

Note 7:

The IRTX pins (IRTX2/GP35 and GP53/TXD2(IRTX)) are driven low when the part is powered by VTR

(VCC=0V with VTR=3.3V). These pins will remain low following a power-up (VCC POR) until serial port 2

is enabled by setting the activate bit, at which time the pin will reflect the state of the transmit output of the

Serial Port 2 block.

Note 8:

The VCC power-up default for this pin is Logic “0” if the IRTX function is programmed on the GPIO.

Note 9:

These pins are inputs to VCC powered logic.

Note 10: External pullups must be placed on the nKBDRST and A20M pins. These pins are GPIOs that are inputs

after an initial power-up (VTR POR). If the nKBDRST and A20M functions are to be used, the system must

ensure that these pins are high. See Section “Pins That Require External Pullup Resistor”.

Note 11: The GP24 /SYSOPT pin requires an external pulldown resistor to put the base IO address for configuration

at 0x02E. An external pullup resistor is required to move the base IO address for configuration to 0x04E.

Note 12: The LED pins are powered by VTR so that the LEDs can be controlled when the part is under VTR power.

4.1 Buffer Name Descriptions

Note: The buffer type values are specified at VCC=3.3V

Input TTL Compatible - Super I/O Block.

Input - Hardware Monitoring Block.

IANG

Analog Input, Hardware Monitoring Block.

Input with Schmitt Trigger.

IMOD3

Input/Output (Open Drain), 3mA sink.

IMO3

Input/Output, 3mA sink, 3mA source.

Output, 6mA sink, 3mA source.

Output, 8mA sink, 4mA source.

OD8

Open Drain Output, 8mA sink.

IO8

Input/Output, 8mA sink, 4mA source.

IS/O8

Input with Schmitt Trigger/Output, 8mA sink, 4mA source.

O12

Output, 12mA sink, 6mA source.

OD12

Open Drain Output, 12mA sink.

IO12

Input/Output, 12mA sink, 6mA source.

OD14

Open Drain Output, 14mA sink.

OP14

Output, 14mA sink, 14mA source.

IOP14

Input/Output, 14mA sink, 14mA source. Backdrive protected.

IOD16

Input/Output (Open Drain), 16mA sink.

PCI_IO

Input/Output. These pins must meet the PCI 3.3V AC and DC Characteristics. (Note 1)

PCI_O

Output. These pins must meet the PCI 3.3V AC and DC Characteristics. (Note 1)

PCI_I

Input. These pins must meet the PCI 3.3V AC and DC Characteristics. (Note 1)

PCI_ICLK

Clock Input. These pins must meet the PCI 3.3V AC and DC Characteristics and timing. (Note 2)

Note 1: See the “PCI Local Bus Specification,” Revision 2.1, Section 4.2.2.

Note 2: See the “PCI Local Bus Specification,” Revision 2.1, Section 4.2.2 and 4.2.3.

4.2 Pins That Require External Pullup Resistors

4.2.1 SUPER I/O PINS

The following pins require external pullup resistors:

KDAT

KCLK

MDAT

MCLK

GP36/KBDRST if KBDRST function is used

GP37/A20M if A20M function is used

GP20/P17 If P17 function is used as an Open Drain Output

LPC47M192 Datasheet(PDF) 20 Page - SMSC Corporation

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