LPC47M192 datasheet(64/228 Pages) SMSC

64 / 228 page

SMSC DS – LPC47M192

Page 64

Rev. 03/30/05

DATASHEET

ENHANCED DUMPREG

The DUMPREG command is designed to support system run-time diagnostics and application software development

and debug. To accommodate the LOCK command and the enhanced PERPENDICULAR MODE command the

eighth byte of the DUMPREG command has been modified to contain the additional data from these two commands.

COMPATIBILITY

The LPC47M192 was designed with software compatibility in mind. It is a fully backwards- compatible solution with

the older generation 765A/B disk controllers. The FDC also implements on-board registers for compatibility with the

PS/2, as well as PC/AT and PC/XT, floppy disk controller subsystems. After a hardware reset of the FDC, all

registers, functions and enhancements default to a PC/AT, PS/2 or PS/2 Model 30 compatible operating mode,

depending on how the IDENT and MFM bits are configured by the system BIOS.

7.4.5 DIRECT SUPPORT FOR TWO FLOPPY DRIVES

The MTR1# function is on pin 43. MTR1# is the second alternate function on the GP22 pin. Pin 43 has the IO12

buffer type.

The MTR1# function is selectable as open drain or push pull as MTR0# is through bit 6 of the FDD Mode Register in

CRF0 of LD 0. This overrides the selection of the output type through bit 7 of the GPIO control register. It is also

controlled by bit 7 of the FDD Mode Register.

The DS1# function is on pin 41. DS1# is the second alternate function on the GP21 pin. Pin 42 has IO12 buffer type.

The DS1# function is selectable as open drain or push pull as DS0# is through bit 6 of the FDD Mode Register in

CRF0 of Logical Device 0. This overrides the selection of the output type through bit 7 of the GPIO control register.

It is also controlled by bit 7 of the FDD Mode register.

See the Runtime Registers section for register information.

Disk Change Support for Second Floppy

Bit[1] in the Force Disk Change register supports the second floppy. Setting either of the Force Disk Change bits

active forces the internal FDD nDSKCHG active when the appropriate drive has been selected. The Force Disk

Change register is defined in the Runtime Registers section.

Force Write Protect Support for Second Floppy

Bit[0] in the Device Disable register and FDD Option register support floppy write protect.

See the Runtime Registers section for Device Disable register description and the Configuration Registers section for

FDD Option register description.

7.4.6 FDC SWAP BIT

The FDC_SWAP bit in the FDD Mode Register (configuration register 0xF0) can be used to swap Drive 0 and Drive 1.

The FDC_SWAP is defined as follows:

Bit[4] FDC_SWAP

0 = Do Not Swap (default)

1 = Swap Drive 0 (nDS, nMTR pins) with Drive 1 (nDS, nMTR pins)

7.5 SERIAL PORT (UART)

The LPC47M192 incorporates two full function UARTs. They are compatible with the 16450, the 16450 ACE

registers and the 16C550A. The UARTS perform serial-to-parallel conversion on received characters and parallel-to-

serial conversion on transmit characters. The data rates are independently programmable from 460.8K baud down to

50 baud. The character options are programmable for 1 start; 1, 1.5 or 2 stop bits; even, odd, sticky or no parity; and

prioritized interrupts. The UARTs each contain a programmable baud rate generator that is capable of dividing the

input clock or crystal by a number from 1 to 65535. The UARTs are also capable of supporting the MIDI data rate.

Refer to the Configuration Registers for information on disabling, power down and changing the base address of

the UARTs. The interrupt from a UART is enabled by programming OUT2 of that UART to a logic “1”. OUT2 being a

logic “0” disables that UART’s interrupt. The second UART also supports IrDA, HP-SIR and ASK-IR modes of

operation.

LPC47M192 Datasheet(PDF) 64 Page - SMSC Corporation

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