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LPC47M192 Datasheet(PDF) 81 Page - SMSC Corporation

Part # LPC47M192
Description  LPC SUPER I/O WITH HARDWARE MONITORING BLOCK
PDF  228 Pages
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Manufacturer  SMSC [SMSC Corporation]
Direct Link  http://www.smsc.com
Logo SMSC - SMSC Corporation

LPC47M192 Datasheet(HTML) 81 Page - SMSC Corporation

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SMSC DS – LPC47M192
Page 81
Rev. 03/30/05
DATASHEET
Interrupt
The MPU-401 IRQ is asserted (‘1’) when either MIDI receive data or a command acknowledge byte is available tot he
host in the MIDI data register (FIGURE 3). the IRQ is deasserted (‘0’) when the host reads the MIDI Data port.
Note: If, following a host read, data is still available in the 16C550A Receive FIFO, the IRQ will remain asserted (‘1’).
The IRQ is enabled when the ‘Activate’ bit in the MPU-401 configuration registers logical device block is asserted ‘1’.
If the Activate bit is deasserted ‘0’, the MPU-401 IRQ cannot be asserted (see Section “MPU-401 Configuration
Registers”).
The MPU-401 IRQ is not affected by MIDI write data, 16C550A transmit-related functions or Receiver Line Status
interrupts.
The factory default Sound Blaster 16 MPU-401 IRQ is 5.
MIDI RX CLOCK
4
MIDI RX DATA BYTE N
MIDI RX DATA BYTE N+1
MIDI_IN
DATA READY
1
IRQ
3
nREAD
2
NOTE: IRQ remains
asserted until read FIFO is
empty
FIGURE 3 - MPU-401 INTERRUPT
NOTE1 DATA READY represents the Data Ready bit B0 in the 16C550A UART Line Status Register.
NOTE2 nREAD represents host read operations from the MIDI Data register.
NOTE3 IRQ is the MPU-401 Host Interface IRQ shown in FIGURE 2. The 16C550A UART Receive FIFO
Threshold=1.
NOTE4 MIDI RX CLOCK is the MIDI bit clock. The MIDI bit clock period is 32
µs.
7.7.5 MPU-401 COMMAND CONTROLLER
Overview
Commands are written by the host to the MPU-401 MIDI Interface through the Command register (Table 33) and are
immediately interpreted by the MPU-401 Command Controller shown in FIGURE 2. The MPU-401 Command
Controller in this implementation only responds to the MPU-401 RESET (FFh) and UART MODE (3Fh) commands.
All other commands are ignored.
Under certain conditions, the Command Controller acknowledges MPU-401 commands with a command
acknowledge byte (FEh).
RESET Command
The RESET command is FFh. The RESET command resets the MPU-401 MIDI Interface. Reset disables the MPU-
401 UART MODE command, disables the 16C550A UART, clears the receive FIFO. The command controller places
the command acknowledge byte ‘FEh’ in the MIDI Data port read buffer if the interface is not in the UART mode.
The RESET command is executed but not acknowledged when the command is received while the interface is in the
UART mode.
When the MPU-401 is reset, receive data from the MIDI_IN port as well as data written by the host to the MIDI Data
port is ignored.
The MPU-401 MIDI Interface is reset following the RESET command or POR.



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