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DSP56857 Datasheet(PDF) 171 Page - Freescale Semiconductor, Inc |
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DSP56857 Datasheet(HTML) 171 Page - Freescale Semiconductor, Inc |
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171 / 662 page  Features Power-On Reset (POR) and Computer Operating Properly (COP), Rev. 4 Freescale Semiconductor 7-3 7.1 Introduction The Power-on Reset (POR) function monitors the core power supply, the I/O, and analog power supply. If either of those power supplies are below their thresholds, the POR output for each respective supply is held high. Once the power supply goes above the thresholds, the POR outputs are held low. Computer Operating Properly (COP) is also discussed in this chapter as it relates to resets. 7.2 Features • The circuit monitors both the core power supply and peripheral power supply • Holds a wide chip reset once either of these supply voltages are below the thresholds • Generates the address of the Reset Vector provided to the core after exit Reset • The address of Reset Vector (same as the COP Reset) is located at $1F0000 The COP module design features include: • Programmable time-out period = (COP_PRESCALER × (CT + 1)) oscillator clock cycles, where CT can be from $0000 to $FFFF • Programmable Wait and Stop mode operations • COP timer is disabled while host CPU is in Debug mode |
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