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SC16C554DB Datasheet(PDF) 36 Page - NXP Semiconductors

Part # SC16C554DB
Description  5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs
PDF  51 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

SC16C554DB Datasheet(HTML) 36 Page - NXP Semiconductors

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9397 750 13133
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 9 February 2005
36 of 51
Philips Semiconductors
SC16C554B/554DB
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs
10. Dynamic characteristics
Table 26:
Dynamic characteristics
Tamb = −40 °C to +85 °C; VCC = 2.5 V, 3.3 V or 5.0 V ± 10 %, unless otherwise specified.
Symbol Parameter
Conditions
2.5 V
3.3 V
5.0 V
Unit
Min
Max
Min
Max
Min
Max
t1w, t2w
clock pulse duration
10
-
6
-
6
-
ns
fXTAL
oscillator/clock frequency
[1] [2] -
48
-
80
80
MHz
t6s
address setup time
0
-
0
-
0
-
ns
t6h
address hold time
0
-
0
-
0
-
ns
t7d
IOR delay from chip select
10
-
10
-
10
-
ns
t7w
IOR strobe width
25 pF load
77
-
26
-
23
-
ns
t7h
chip select hold time from
IOR
0-
0-
0
-
ns
t9d
read cycle delay
25 pF load
20
-
20
-
20
-
ns
t12d
delay from IOR to data
25 pF load
-
77
-
26
-
23
ns
t12h
data disable time
25 pF load
-
15
-
15
-
15
ns
t13d
IOW delay from chip
select
10
-
10
-
10
-
ns
t13w
IOW strobe width
20
-
20
-
15
-
ns
t13h
chip select hold time from
IOW
0-
0-
0
-
ns
t15d
write cycle delay
25
-
25
-
20
-
ns
t16s
data setup time
20
-
20
-
15
-
ns
t16h
data hold time
15
-
5
-
5
-
ns
t17d
delay from IOW to output
25 pF load
-
100
-
33
-
29
ns
t18d
delay to set interrupt from
modem input
25 pF load
-
100
-
24
-
23
ns
t19d
delay to reset interrupt
from IOR
25 pF load
-
100
-
24
-
23
ns
t20d
delay from stop to set
interrupt
-1 TRCLK
[3]
-1 TRCLK
[3]
-1 TRCLK
[3]
ns
t21d
delay from IOR to
reset interrupt
25 pF load
-
100
-
29
-
28
ns
t22d
delay from start to
set interrupt
-
100
-
45
-
40
ns
t23d
delay from IOW to
transmit start
8TRCLK
[3]
24 TRCLK
[3]
8TRCLK
[3]
24 TRCLK
[3]
8TRCLK
[3]
24 TRCLK
[3]
ns
t24d
delay from IOW to
reset interrupt
-
100
-
45
-
40
ns
t25d
delay from stop to
set RXRDY
-1 TRCLK
[3]
-1 TRCLK
[3]
-1 TRCLK
[3]
ns
t26d
delay from IOR to
reset RXRDY
-
100
-
45
-
40
ns
t27d
delay from IOW to
set TXRDY
-
100
-
45
-
40
ns



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