SC16C554DB datasheet(12/51 Pages) PHILIPS

12 / 51 page

9397 750 13133

Product data sheet

Rev. 01 — 9 February 2005

12 of 51

Philips Semiconductors

SC16C554B/554DB

5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs

RXA, RXB,

RXC, RXD

7, 29,

41, 63

62, 20,

29, 51

17, 44,

57, 4

Receive data input RXA to RXD. These inputs are associated with

individual serial channel data to the SC16C554B/554DB. The RX

signal will be a logic 1 during reset, idle (no data), or when the

transmitter is disabled. During the local loop-back mode, the RX

input pin is disabled and TX data is connected to the UART RX

input internally.

RXRDY

Receive Ready (active LOW). RXRDY contains the wire-ORed

status of all four receive channel FIFOs, RXRDYA to RXRDYD. A

logic 0 indicates receive data ready status, that is, the RHR is full, or

the FIFO has one or more RX characters available for unloading.

This pin goes to a logic 1 when the FIFO/RHR is empty, or when

there are no more characters available in either the FIFO or RHR.

Individual channel RX status is read by examining individual internal

registers via CS and A0 to A4 pin functions.

TXA, TXB,

TXC, TXD

17, 19,

51, 53

8, 10,

39, 41

29, 32,

69, 72

Transmit data A, B, C, D. These outputs are associated with

individual serial transmit channel data from the

SC16C554B/554DB. The TX signal will be a logic 1 during reset,

idle (no data), or when the transmitter is disabled. During the local

loop-back mode, the TX output pin is disabled and TX data is

internally connected to the UART RX input.

TXRDY

Transmit Ready (active LOW). TXRDY contains the wire-ORed

status of all four transmit channel FIFOs, TXRDYA to TXRDYD. A

logic 0 indicates a buffer ready status, that is, at least one location is

empty and available in one of the TX channels (A to D). This pin

goes to a logic 1 when all four channels have no more empty

locations in the TX FIFO or THR. Individual channel TX status can

be read by examining individual internal registers via CS and

A0 to A4 pin functions.

VCC

13, 30,

47, 64

4, 21,

35, 52

5, 25,

45, 65

Power supply inputs.

XTAL1

Crystal or external clock input. Functions as a crystal input or as

an external clock input. A crystal can be connected between this pin

and XTAL2 to form an internal oscillator circuit (see Figure 11).

Alternatively, an external clock can be connected to this pin to

provide custom data rates. (See Section 6.6 “Programmable baud

rate generator”.)

XTAL2

Output of the crystal oscillator or buffered clock. (See also

XTAL1.) Crystal oscillator output or buffered clock output.

Table 2:

Pin description …continued

Symbol

Type

Description

PLCC68

LQFP64

LQFP80

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