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SC16C554DB Datasheet(PDF) 16 Page - NXP Semiconductors

Part # SC16C554DB
Description  5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs
PDF  51 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

SC16C554DB Datasheet(HTML) 16 Page - NXP Semiconductors

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9397 750 13133
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 9 February 2005
16 of 51
Philips Semiconductors
SC16C554B/554DB
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs
6.4 Autoflow control (see Figure 7)
Autoflow control is comprised of auto-CTS and auto-RTS. With auto-CTS, the CTS input
must be active before the transmitter FIFO can emit data. With auto-RTS, RTS becomes
active when the receiver needs more data and notifies the sending serial device. When
RTS is connected to CTS, data transmission does not occur unless the receiver FIFO has
space for the data; thus, overrun errors are eliminated using UART 1 and UART 2 from a
SC16C554B/554DB with the autoflow control enabled. If not, overrun errors occur when
the transmit data rate exceeds the receiver FIFO read latency.
6.4.1 Auto-RTS (see Figure 7)
Auto-RTS data flow control originates in the receiver timing and control block (see block
diagrams in Figure 1 and Figure 2) and is linked to the programmed receiver FIFO trigger
level. When the receiver FIFO level reaches a trigger level of 1, 4, or 8 (see Figure 9), RTS
is de-asserted. With trigger levels of 1, 4, and 8, the sending UART may send an
additional byte after the trigger level is reached (assuming the sending UART has another
byte to send) because it may not recognize the de-assertion of RTS until after it has
begun sending the additional byte. RTS is automatically reasserted once the RX FIFO is
emptied by reading the receiver buffer register. When the trigger level is 14 (see
Figure 10), RTS is de-asserted after the first data bit of the 16th character is present on
the RX line. RTS is reasserted when the RX FIFO has at least one available byte space.
6.4.2 Auto-CTS (see Figure 7)
The transmitter circuitry checks CTS before sending the next data byte. When CTS is
active, it sends the next byte. To stop the transmitter from sending the following byte, CTS
must be released before the middle of the last stop bit that is currently being sent (see
Figure 8). The auto-CTS function reduces interrupts to the host system. When flow control
is enabled, CTS level changes do not trigger host interrupts because the device
automatically controls its own transmitter. Without auto-CTS, the transmitter sends any
data present in the transmit FIFO and a receiver overrun error may result.
Fig 7.
Autoflow control (auto-RTS and auto-CTS) example
RCV
FIFO
SERIAL TO
PARALLEL
FLOW
CONTROL
XMT
FIFO
PARALLEL
TO SERIAL
FLOW
CONTROL
PARALLEL
TO SERIAL
FLOW
CONTROL
SERIAL TO
PARALLEL
FLOW
XMT
FIFO
RCV
FIFO
ACE1
ACE2
D7 to D0
RX
TX
RTS
CTS
TX
RX
D7 to D0
CONTROL
002aaa048
CTS
RTS



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