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SC16C554DB Datasheet(PDF) 11 Page - NXP Semiconductors

Part # SC16C554DB
Description  5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs
PDF  51 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

SC16C554DB Datasheet(HTML) 11 Page - NXP Semiconductors

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9397 750 13133
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 9 February 2005
11 of 51
Philips Semiconductors
SC16C554B/554DB
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 16-byte FIFOs
IOW
18
9
31
I
Input/Output Write strobe (active LOW). This function is
associated with the 16 mode only. A logic 0 transition on this pin will
transfer the contents of the data bus (D0 to D7) from the external
CPU to an internal register that is defined by address bits A0 to A2.
When the 68 mode is selected, this pin functions as R/W (see
definition under R/W).
IRQ
15
-
-
O
Interrupt Request or Interrupt ‘A’. This function is associated with
the 68 mode only. In the 68 mode, interrupts from UART channels
A to D are wire-ORed internally to function as a single IRQ
interrupt. This pin transitions to a logic 0 (if enabled by the interrupt
enable register) whenever a UART channel(s) requires service.
Individual channel interrupt status can be determined by addressing
each channel through its associated internal register, using CS and
A3 to A4. In the 68 mode, and external pull-up resistor must be
connected between this pin and VCC. The function of this pin
changes to INTA when operating in the 16 mode (see definition
under INTA).
n.c.
21, 49,
52, 54,
55, 65
-
1, 10,
20, 21,
30, 40,
41, 49,
52, 60,
61, 71,
80
-
not connected
RESET
(RESET)
37
27
53
I
Reset. In the 16 mode, a logic 1 on this pin will reset the internal
registers and all the outputs. The UART transmitter output and the
receiver input will be disabled during reset time. (See Section 7.10
“SC16C554B/554DB external reset conditions” for initialization
details.) When 16/68 is a logic 0 (68 mode), this pin functions
similarly, bus as an inverted reset interface signal, RESET.
RIA, RIB,
RIC, RID
8, 28,
42, 62
63, 19,
30, 50
18, 43,
58, 3
I
Ring Indicator (active LOW). These inputs are associated with
individual UART channels, A to D. A logic 0 on this pin indicates the
modem has received a ringing signal from the telephone line. A
logic 1 transition on this input pin will generate an interrupt.
RTSA, RTSB,
RTSC, RTSD
14, 22,
48, 56
5, 13,
36, 44
26, 35,
66, 75
O
Request to Send (active LOW). These outputs are associated with
individual UART channels, A to D. A logic 0 on the RTS pin
indicates the transmitter has data ready and waiting to send. Writing
a logic 1 in the modem control register MCR[1] will set this pin to a
logic 0, indicating data is available. After a reset this pin will be set
to a logic 1. This pin only affects the transmit and receive operations
when auto-RTS function is enabled via MCR[5] for hardware flow
control operation.
R/W18
-
-
I
Read/Write strobe. This function is associated with the 68 mode
only. This pin provides the combined functions for Read or Write
strobes.
Logic 1 = Read from UART register selected by CS and A0 to A4.
Logic0=Write to UART register selected by CS and A0 to A4.
Table 2:
Pin description …continued
Symbol
Pin
Type
Description
PLCC68
LQFP64
LQFP80



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