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STM32WB55CC Datasheet(PDF) 120 Page - STMicroelectronics

Part # STM32WB55CC
Description  Multiprotocol wireless 32-bit MCU Arm
PDF  165 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32WB55CC Datasheet(HTML) 120 Page - STMicroelectronics

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Electrical characteristics
STM32WB55xx
120/165
DS11929 Rev 3
Static latch-up
Two complementary static tests are required on six parts to assess the latch-up
performance:
•
a supply overvoltage is applied to each power supply pin
•
acurrent injection is applied to each input, output and configurable I/O pin.
These tests are compliant with EIA/JESD 78A IC latch-up standard.
6.3.16
I/O current injection characteristics
As a general rule, current injection to the I/O pins, due to external voltage below VSS or
above VDD (for standard, 3.3 V-capable I/O pins) should be avoided during normal product
operation. However, in order to give an indication of the robustness of the microcontroller in
cases when abnormal injection accidentally happens, susceptibility tests are performed on a
sample basis during device characterization.
Functional susceptibility to I/O current injection
While a simple application is executed on the device, the device is stressed by injecting
current into the I/O pins programmed in floating input mode. While current is injected into
the I/O pin, one at a time, the device is checked for functional failures.
The failure is indicated by an out of range parameter: ADC error above a certain limit (higher
than 5 LSB TUE), out of conventional limits of induced leakage current on adjacent pins (out
of the -5 µA / +0 µA range) or other functional failure (for example reset occurrence or
oscillator frequency deviation).
The characterization results are given in Table 67.
Negative induced leakage current is caused by negative injection and positive induced
leakage current is caused by positive injection.
Table 66. Electrical sensitivities
Symbol
Parameter
Conditions
Class
LU
Static latch-up class
TA = +105 °C conforming to JESD78A
II
Table 67. I/O current injection susceptibility(1)
1. Guaranteed by characterization results.
Symbol
Description
Functional susceptibility
Unit
Negative
injection
Positive
injection
IINJ
Injected current on all pins except PB0, PB1
TBD
N/A(2)
2. Injection not possible.
mA
Injected current on PB0, PB1 pins
TBD
TBD



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